UPD17073 NEC, UPD17073 Datasheet - Page 127

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

15.2 Input Selector Block and Programmable Divider
15.2.1 Configuration and function of input selector block and programmable divider
connecting a capacitor in series.
programmable counter.
VCOH
VCOL
Figure 15-2 shows the configuration of the input selector block and programmable divider.
The input selector block selects the input pin and division method of the PLL frequency synthesizer.
As the input pin, the VCOH or VCOL pin can be selected.
The selected pin is at the intermediate potential (approx. 1/2V
These pins have an AC amplifier at the input stage; therefore, cut the DC component of the input signal by
As the division method, DC division method or pulse swallow method can be selected.
The programmable divider performs frequency division according to the values set to the swallow counter and
Table 15-1 shows each input pin (VCOH and VCOL) and division method.
The input pin and division method to be used are selected by the PLL mode select register.
Figure 15-3 shows the configuration of the PLL mode select register.
A division value is set by using the PLL data register.
The division value is transferred to the programmable divider using PLL data set register.
Figure 15-2. Configuration of Input Selector Block and Programmable Divider
PLLMD1 flag
PLLMD0 flag
1/2
PLL disable signal
2 modular prescalers
DD
1/32, 1/33
). The pin not selected is internally pulled down.
PLL data register
12 bits
counter, 12 bits
Programmable
PLL PUT flag
12
PD17072,17073
Swallower
counter,
5 bits
5 bits
5
To f
N
f
-DET
127