S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 223

• Manufacturer Part Number: S9S12G128F0VLL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G128F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 86
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

1
2.4.3.30
Freescale Semiconductor
Address 0x0254 (G1, G2)
Address 0x0254 (G3)
Read: Anytime
Write: Anytime
DDRM
PERM
PERM
Field
Field
Reset
Reset
3-0
3-1
0
W
W
R
R
Port M data direction—
This bit determines whether the associated pin is a general-purpose input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Port M pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If a pin is used as output this bit has only effect if used in wired-or mode with a pullup
device.
1 Pull device enabled
0 Pull device disabled
Port M pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If a pin is used as output this bit has only effect if used in wired-or mode with a pullup
device.
If CAN is active the selection of a pulldown device on the RXCAN input will have no effect.
1 Pull device enabled
0 Pull device disabled
Port M Pull Device Enable Register (PERM)
0
0
0
0
7
7
Figure 2-31. Port M Pull Device Enable Register (PERM)
0
0
0
0
6
6
Table 2-54. DDRM Register Field Descriptions
Table 2-55. PERM Register Field Descriptions
MC9S12G Family Reference Manual, Rev.1.23
0
0
0
0
5
5
0
0
0
0
4
4
Description
Description
PERM3
3
0
3
0
0
PERM2
0
0
0
2
2
Port Integration Module (S12GPIMV1)
PERM1
PERM1
Access: User read/write
Access: User read/write
0
0
1
1
PERM0
PERM0
0
0
0
0
225
1
1