S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 328

• Manufacturer Part Number: S9S12G128F0VLL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G128F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 86
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

S12S Debug Module (S12SDBGV2)
8.3.2.8.3
Read: Anytime. See
Write: If DBG not armed. See
8.3.2.8.4
Read: Anytime. See
Write: If DBG not armed. See
330
Address: 0x002A
Address: 0x002B
Bit[15:8]
Bits[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
Bit 15
Comparator Address Mid Compare Bits — The Comparator address mid compare bits control whether the
selected comparator compares the address bus bits [15:8] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
Bit 7
Comparator Address Low Compare Bits — The Comparator address low compare bits control whether the
selected comparator compares the address bus bits [7:0] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
0
0
7
7
Debug Comparator Address Mid Register (DBGXAM)
Debug Comparator Address Low Register (DBGXAL)
Figure 8-17. Debug Comparator Address Mid Register (DBGXAM)
Figure 8-18. Debug Comparator Address Low Register (DBGXAL)
Table 8-24
Table 8-24
Bit 14
Bit 6
0
0
6
6
Table 8-24
Table 8-24
for visible register encoding.
for visible register encoding.
MC9S12G Family Reference Manual, Rev.1.23
Table 8-26. DBGXAM Field Descriptions
Table 8-27. DBGXAL Field Descriptions
Bit 13
Bit 5
0
0
5
5
for visible register encoding.
for visible register encoding.
Bit 12
Bit 4
0
0
4
4
Description
Description
Bit 11
Bit 3
0
0
3
3
Bit 10
Bit 2
0
0
2
2
Freescale Semiconductor
Bit 9
Bit 1
0
0
1
1
Bit 8
Bit 0
0
0
0
0