S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 710

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S9S12G128F0VLL

Manufacturer Part Number
S9S12G128F0VLL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G128F0VLL

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
86
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

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Serial Peripheral Interface (S12SPIV5)
21.3.2.3
Read: Anytime
Write: Anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
712
Module Base +0x0002
SPPR[2:0]
SPR[2:0]
Reset
SPPR2
Field
6–4
2–0
0
0
0
0
0
0
0
0
0
0
W
R
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
mode, a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Register (SPIBR)
0
0
7
For maximum allowed baud rates, please refer to the SPI Electrical
Specification in the Electricals chapter of this data sheet.
SPPR1
0
0
0
0
0
0
0
0
0
0
Table 21-6. Example SPI Baud Rate Selection (25 MHz Bus Clock)
= Unimplemented or Reserved
SPPR2
0
6
Baud Rate = BusClock / BaudRateDivisor
BaudRateDivisor = (SPPR + 1) • 2
SPPR0
0
0
0
0
0
0
0
0
1
1
Figure 21-5. SPI Baud Rate Register (SPIBR)
MC9S12G Family Reference Manual,
Table 21-5. SPIBR Field Descriptions
SPPR1
0
5
SPR2
0
0
0
0
1
1
1
1
0
0
SPPR0
NOTE
SPR1
0
4
0
0
1
1
0
0
1
1
0
0
Description
SPR0
(SPR + 1)
0
0
0
1
0
1
0
1
0
1
0
1
3
Rev.1.23
Baud Rate
SPR2
Divisor
0
2
128
256
16
32
64
2
4
8
4
8
Table
Freescale Semiconductor
SPR1
21-6. In master mode,
0
Table
1
1.5625 Mbit/s
781.25 kbit/s
390.63 kbit/s
195.31 kbit/s
3.125 Mbit/s
3.125 Mbit/s
97.66 kbit/s
Baud Rate
12.5 Mbit/s
6.25 Mbit/s
6.25 Mbit/s
21-6. In master
Eqn. 21-1
Eqn. 21-2
SPR0
0
0

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