S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 327

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S9S12G128F0VLL

Manufacturer Part Number
S9S12G128F0VLL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G128F0VLL

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
86
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

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8.3.2.8.2
The DBGC1_COMRV bits determine which comparator address registers are visible in the 8-byte window
from 0x0028 to 0x002F as shown in
Read: Anytime. See
Write: If DBG not armed. See
Freescale Semiconductor
Address: 0x0029
Bit[17:16]
Reset
Field
1–0
W
R
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
selected comparator compares the address bus bits [17:16] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
0
0
7
Debug Comparator Address High Register (DBGXAH)
RWE Bit
Figure 8-16. Debug Comparator Address High Register (DBGXAH)
Table 8-24
0
0
1
1
1
1
= Unimplemented or Reserved
0
0
6
Table 8-24. Comparator Address Register Visibility
Table 8-23. Read or Write Comparison Logic Table
RW Bit
Table 8-24
for visible register encoding.
MC9S12G Family Reference Manual, Rev.1.23
x
x
0
0
1
1
Table 8-25. DBGXAH Field Descriptions
COMRV
Section Table 8-24., “Comparator Address Register Visibility
00
01
10
11
0
0
5
RW Signal
for visible register encoding.
DBGCAH, DBGCAM, DBGCAL
DBGAAH, DBGAAM, DBGAAL
DBGBAH, DBGBAM, DBGBAL
0
1
0
1
0
1
Visible Comparator
0
0
4
Description
None
RW not used in comparison
RW not used in comparison
0
0
3
Write data bus
Read data bus
Comment
No match
No match
0
0
2
S12S Debug Module (S12SDBGV2)
Bit 17
0
1
Bit 16
0
0
329

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