MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 229
MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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5.3.2.5
The system I/O configuration register low (SICRL) controls the multiplexing of some of the device I/O
pins. Each bit or set of bits in the SICRL selects which function is used by a certain group of the device
pins.
Figure 5-14
Table 5-28
pin used in this option. Some groups have only two options (shown as Pin Function 0 and Pin Function 1)
and therefore, only one control bit. In this case they can only have a value of 0b0 or 0b1. Other groups may
have four options (shown as Pin Function 0, Pin Function 1, Pin Function 2, and Pin Function 3) and
therefore, two control bits. In this case they can have a value of 0b00, 0b01, 0b10, or 0b11. Use the
notations ‘0bN’ or ‘0bNN’ according to whether a group has one or two control bits, respectively.
Freescale Semiconductor
Bits
0–1
Offset 0x00114
Reset
Reset
Reset
Reset
SICRL[Bits]
W
W
W
W
Value
R
R
R
R
Reserved
Group
defines the bit fields of SICRL. Each Pin Function column lists the name of the multi-function
16
24
0
1
shows SICRL.
0
8
System I/O Configuration Register Low (SICRL)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
SPI_B
—
Pin Function 0
Figure 5-14. System I/O Configuration Register Low (SICRL)
0b0/0b00
17
25
0
1
1
9
—
—
—
10
18
26
1
1
2
Table 5-28. SICRL Bit Settings
SPI_C
LBC
Pin Function 1
0b1/0b01
—
Depends on RCW
11
19
27
1
1
3
All zeros
12
20
28
0
1
4
Pin Function 2
ETSEC1_A
USB_DR
SPI_D
UART
0b10
—
13
21
29
0
1
5
Pin Function 3
0b11
14
22
30
1
0
6
—
System Configuration
ETSEC2_A
Access: Read/Write
SPI_A
—
—
15
23
31
1
0
7
Reset
Value
00
5-21
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