MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 37
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MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Paragraph
Number
19.4.1.5
19.4.1.6
19.4.1.6.1
19.5
19.5.1
19.5.2
20.1
20.2
20.2.1
20.3
21.1
21.1.1
21.1.2
21.2
21.2.1
21.3
21.3.1
21.3.2
21.3.3
21.3.4
21.3.5
21.3.6
A.1
A.2
Freescale Semiconductor
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Initialization/Application Information ......................................................................... 19-16
Overview........................................................................................................................ 20-1
JTAG Signals ................................................................................................................. 20-1
JTAG Registers and Scan Chains .................................................................................. 20-3
Introduction.................................................................................................................... 21-1
External Signal Description ........................................................................................... 21-2
Memory Map/Register Definition ................................................................................. 21-2
Changes From Revision 1 to Revision 2 ........................................................................ A-1
Changes From Revision 0 to Revision 1 ...................................................................... A-23
SPI Master Programming Example ......................................................................... 19-16
SPI Slave Programming Example............................................................................ 19-16
External Signal Descriptions ..................................................................................... 20-2
Overview.................................................................................................................... 21-1
Features...................................................................................................................... 21-1
Signals Overview....................................................................................................... 21-2
GPIO Direction Register (GPDIR) ............................................................................ 21-3
GPIO Open Drain Register (GPODR)....................................................................... 21-3
GPIO Data Register (GPDAT)................................................................................... 21-4
GPIO Interrupt Event Register (GPIER) ................................................................... 21-4
GPIO Interrupt Mask Register (GPIMR)................................................................... 21-4
GPIO Interrupt Control Register (GPICR) ................................................................ 21-5
SPI Transmit Data Hold Register (SPITD).......................................................... 19-14
SPI Receive Data Hold Register (SPIRD)........................................................... 19-15
Reverse Mode SPMODE[REV] Examples ..................................................... 19-15
General Purpose I/O (GPIO)
JTAG/Testing Support
Revision History
Contents
Appendix A
Chapter 20
Chapter 21
Glossary
Index
Title
Number
Page
xxxvii
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