MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 48

• Manufacturer Part Number: MPC8313EZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB W/ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313EZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

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14-33
14-34
14-35
14-36
14-37
14-38
14-39
14-40
14-41
14-42
14-43
14-44
14-45
14-46
14-47
15-1
15-2
15-3
15-4
15-5
15-6
15-7
15-8
15-9
15-10
15-11
15-12
15-13
15-14
15-15
15-16
15-17
15-18
15-19
15-20
15-21
15-22
15-23
15-24
15-25
15-26
xlviii
AESU End-of-Message Register (AESUEMR).................................................................. 14-49
AESU Context Registers..................................................................................................... 14-49
AESU CCM Context Registers........................................................................................... 14-51
Crypto-Channel Configuration Register (CCCR)............................................................... 14-55
Crypto-Channel Pointer Status Register (CCPSR) ............................................................. 14-57
Crypto-Channel Current Descriptor Pointer Register (CDPR)........................................... 14-62
Fetch FIFO Register (FF).................................................................................................... 14-63
Descriptor Buffer (DB) ....................................................................................................... 14-63
EU Assignment Status Register (EUASR) ......................................................................... 14-68
Interrupt Mask Register (IMR) ........................................................................................... 14-69
Interrupt Status Register (ISR)............................................................................................ 14-71
Interrupt Clear Register (ICR) ............................................................................................ 14-72
ID Register (ID) .................................................................................................................. 14-73
IP Block Revision Register ................................................................................................. 14-73
Master Control Register (MCR) ......................................................................................... 14-74
eTSEC Block Diagram.......................................................................................................... 15-2
TSEC_ID Register .............................................................................................................. 15-22
TSEC_ID2 Register ............................................................................................................ 15-23
IEVENT Register Definition .............................................................................................. 15-25
IMASK Register Definition ................................................................................................ 15-28
EDIS Register Definition .................................................................................................... 15-29
ECNTRL Register Definition ............................................................................................. 15-31
PTV Register Definition...................................................................................................... 15-33
DMACTRL Register........................................................................................................... 15-34
TCTRL Register Definition ................................................................................................ 15-35
TSTAT Register Definition ................................................................................................. 15-37
DFVLAN Register Definition............................................................................................. 15-41
TXIC Register Definition.................................................................................................... 15-42
TQUEUE Register Definition ............................................................................................. 15-43
TR03WT Register Definition.............................................................................................. 15-44
TR47WT Register Definition.............................................................................................. 15-44
TBDBPH Register Definition ............................................................................................. 15-45
TBPTR0–TBPTR7 Register Definition .............................................................................. 15-46
TBASE Register Definition ................................................................................................ 15-46
TMR_TXTSn_ID Register Definition ................................................................................ 15-47
TMR_TXTSn_H/L Register Definition.............................................................................. 15-47
RCTRL Register Definition ................................................................................................ 15-48
RSTAT Register Definition ................................................................................................. 15-50
RXIC Register Definition ................................................................................................... 15-52
RQUEUE Register Definition............................................................................................. 15-53
RBIFX Register Definition ................................................................................................. 15-54
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
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