DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 15

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

RRING
TRING
3. BLOCK DIAGRAM
Figure 3-1
DS21455.
Figure 3-1. DS21458 Block Diagram
RTIP
TTIP
TPD
JTDO
CLOCK & DATA
GENERATION
TRANSMIT
WAVESHAPE
RECOVERY
JTDI
RECEIVE
shows a simplified block diagram highlighting the major components of the DS21458 and
(1 OF 4 TRANSCEIVERS)
LIU
LIU
JTAG
JTCLK
DS21458
MCLK1
MASTER
CLOCK
JTRST
LOCAL
LOOP
BACK
JTMS
MCLK2
ATTEN.
OR RX
ATTEN.
JITTER
JITTER
PATH
TX
ESIBS0
REMOT E
LOOP
BACK
ESIB
RPOSO
ESIBS1
ESIBRD
RNEGO
RCLKO
TPOSI
15 of 269
TNEGO
TCLKO
FRAMER
LOOP
BACK
2 HDLCs
DS21455/DS21458 Quad T1/E1/J1 Transceivers
2 HDLCs
SIGNALING EXTRACTION
CRC RECALCULATE(E1)
HDB3/B8ZS DECODER
SIGNALING INSERTION
ALARM MONITORING
SYNCHRONIZATION
DS0 CONDITIONING
HDLC EXTRACTION
DS0 CONDITIONING
HDB3/B8ZS CODER
ALARM INSERTION
TRANSMIT
HDLC INSERTION
RECEIVE
FRAMER
FRAMER
MUX/NON-MUX, INTEL/MOTOROLA
FRAMING
BERT
CPU INTERFACE
BERT
TRANSCEIVER #2
TRANSCEIVER #3
TRANSCEIVER #4
BACKPLANE
CLOCK
SIGNALING BUFFERS
PAYLOAD LOOPBACK
BACKPLANE
RATE CONVERSION
SIGNALING BUFFERS
PAYLOAD LOOPBACK
BACKPLANE
INTERFACE
RATE CONVERSION
ELASTIC STORES
INTERLEAVE BUS
INTERFACE
ELASTIC STORES
INTERLEAVE BUS
TRANSMIT
RECEIVE
TRANSMIT
BACKPLANE
INTERFACE
TSYSCLK
TCLK
TSER
TSIG
TSYNC
TSSYNC
TCHCLK
TCHBLK
TLCLK
TLINK
BPCLK
RSYSCLK
RCLK
RSER
RSIG
RSIGF
RSYNC
RFSYNC
RMSYNC
RCHCLK
RCHBLK
RLCLK
RLINK
RLOS/LOTC