DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 197

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DS21458LDK

Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
28.1 Number of Error Registers
The number of error registers determines how many errors will be generated. Up to 1023 errors can be
generated. The host will load the number of errors to be generated into the NOE1 and NOE2 registers.
The host can also update the number of errors to be created by first loading the prescribed value into the
NOE registers and then toggling the WNOE bit in the error rate control registers.
Table 28-2. Error Insertion Examples
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Number of Errors Counter Bits 0 to 7 (C0 to C7). Bit C0 is the LSB of the 10-bit counter.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 1/Number of Errors Counter Bits 8 to 9 (C8 to C9). Bit C9 is the MSB of the 10-bit counter.
VALUE
3FFh
000h
001h
002h
C7
7
0
7
0
Do not create any errors
Create a single error
Create 1023 errors
Create two errors
C6
WRITE
NOE1
Number Of Errors 1
ECh
NOE2
Number Of Errors 2
EDh
6
0
6
0
C5
5
0
5
0
C4
4
0
4
0
1023 errors left to be inserted
Two errors left to be inserted
197 of 269
One error left to be inserted
No errors left to be inserted
C3
3
0
3
0
READ
DS21455/DS21458 Quad T1/E1/J1 Transceivers
C2
2
0
2
0
C1
C9
1
0
1
0
C0
C8
0
0
0
0

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