DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 161
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DS21458LDK
Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21458LDK.pdf
(269 pages)
- Current page: 161 of 269
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DS21455/DS21458 Quad T1/E1/J1 Transceivers
25.3 LIU Transmitter
The DS21455/DS21458 use a phase-lock loop along with a precision digital-to-analog converter (DAC)
to create the waveforms that are transmitted onto the E1 or T1 line. The waveforms created by the
transmitter meet the latest ETSI, ITU, ANSI, and AT&T specifications. The user will select which
waveform is to be generated by setting the ETS bit (LIC2.7) for E1 or T1 operation, then programming
the L2/L1/L0 bits in register LIC1 for the appropriate application.
A 2.048MHz or 1.544MHz clock is required at TCLKI for transmitting data presented at TPOSI and
TNEGI. Normally these pins are connected to TCLKO, TPOSO and TNEGO. However, the LIU may
operate in an independent fashion. ITU specification G.703 requires an accuracy of ±50ppm for both T1
and E1. TR62411 and ANSI specs require an accuracy of ±32ppm for T1 interfaces. The clock can be
sourced internally from RCLK or JACLK. See LIC2.3, LIC4.4 and LIC4.5 for details. Due to the nature
of the design of the transmitter, very little jitter (less than 0.005 UI
broadband from 10Hz to 100kHz) is
P-P
added to the jitter present on TCLK. Also, the waveforms created are independent of the duty cycle of
TCLK. The transmitter couples to the E1 or T1 transmit twisted pair (or coaxial cable in some E1
applications) via a 1:2 step-up transformer. In order for the device to create the proper waveforms, the
transformer used must meet the specifications listed in
Table
25-8. The DS21455/DS21458 have the
option of using software-selectable transmit termination.
The transmit line drive has two modes of operation: fixed gain or automatic gain. In the fixed gain mode,
the transmitter outputs a fixed current into the network load to achieve a nominal pulse amplitude. In the
automatic gain mode, the transmitter adjusts its output level to compensate for slight variances in the
network load. Automatic Gain Control is enabled by default. See the Transmit Line Build-Out Control
(TLBC) register for details.
25.3.1 Transmit Short-Circuit Detector/Limiter
The DS21455/DS21458 have automatic short-circuit limiters that limit the source current to 50mA
(RMS) into a 1 load. This feature can be disabled by setting the SCLD bit (LIC2.1) = 1. TCLE
(INFO2.5) provides a real-time indication of when the current limiter is activated. If the current limiter is
disabled, TCLE will indicate that a short-circuit condition exist. Status Register SR1.2 provides a latched
version of the information, which can be used to activate an interrupt when enable via the IMR1 register.
When set low, the TPD bit (LIC1.0) will power-down the transmit line driver and tri-state the TTIP and
TRING pins.
25.3.2 Transmit Open-Circuit Detector
The DS21455/DS21458 can also detect when the TTIP or TRING outputs are open circuited. TOCD
(INFO2.4) will provide a real-time indication of when an open circuit is detected. SR1 provides a latched
version of the information (SR1.1), which can be used to activate an interrupt when enable via the IMR1
register.
161 of 269
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