DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 261

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DS21458LDK

Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
Figure 38-9. Receive Side Timing, Elastic Store Disabled (E1 Mode)
RSER / RDATA / RSIG
RFSYNC / RMSYNC
RCHCLK
RCHBLK
RSYNC
RLCLK
RCLK
Notes:
1. RSYNC is in the output mode (RCR1.5 = 0).
2. RLCLK will only pulse high during Sa bit locations as defined in RCR2; no relationship
RLINK
between RLCLK and RSYNC or RFSYNC is implied.
1
2
t D1
t D2
t D1
t D2
Bit Position
Sa4 to Sa8
t
t D2
D2
261 of 269
t D2
Channel 1
MSB of
DS21455/DS21458 Quad T1/E1/J1 Transceivers

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