DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 231
DS21458LDK
Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21458LDK.pdf
(269 pages)
Figure 36-4. Receive Side 1.544MHz Boundary Timing (With Elastic Store
Enabled)
NOTES:
1) RSYNC is in the output mode (IOCR1.4 = 0).
2) RSYNC is in the input mode (IOCR1.4 = 1).
3) RCHBLK is programmed to block channel 24.
RCHBLK
RSYSCLK
RMSYNC
RCHCLK
RSYNC
RSYNC
RSIG
RSER
2
1
3
CHANNEL 23
CHANNEL 23
A
B
C/A D/B
LSB
MSB
231 of 269
CHANNEL 24
CHANNEL 24
A
B
DS21455/DS21458 Quad T1/E1/J1 Transceivers
C/A D/B
LSB
F
MSB
CHANNEL 1
CHANNEL 1
A
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