DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 64

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

11. E1 FRAMER/FORMATTER CONTROL REGISTERS
The E1 framer portion of the DS21455/DS21458 is configured via a set of four control registers.
Typically, the control registers are only accessed when the system is first powered up. Once the device
has been initialized, the control registers will only need to be accessed when there is a change in the
system configuration. There are two receive control registers (E1RCR1 and E1RCR2) and two transmit
control registers (E1TCR1 and E1TCR2). There are also four status and information registers. Each of
these eight registers is described in this section.
11.1 E1 Control Registers
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Resync (RESYNC). When toggled from low to high, a resync is initiated. Must be cleared and set again for a subsequent
resync.
Bit 1/Sync Enable (SYNCE).
Bit 2/Frame Resync Criteria (FRC).
Bit 3/Receive CRC-4 Enable (RCRC4).
Bit 4/Receive G.802 Enable (RG802). See the Signaling Operation section for details.
Bit 5/Receive HDB3 Enable (RHDB3).
Bit 6/Receive Signaling Mode Select (RSIGM).
Bit 7/RSER Control (RSERC).
0 = auto resync enabled
1 = auto resync disabled
0 = resync if FAS received in error 3 consecutive times
1 = resync if FAS or bit 2 of non-FAS is received in error three consecutive times
0 = CRC-4 disabled
1 = CRC-4 enabled
0 = do not force RCHBLK high during bit 1 of time slot 26
1 = force RCHBLK high during bit 1 of time slot 26
0 = HDB3 disabled
1 = HDB3 enabled
0 = CAS signaling mode
1 = CCS signaling mode
0 = allow RSER to output data as received under all conditions
1 = force RSER to one under loss-of-frame alignment conditions
RSERC
7
0
RSIGM
E1RCR1
E1 Receive Control Register 1
33h
6
0
RHDB3
5
0
RG802
4
0
64 of 269
RCRC4
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
FRC
2
0
SYNCE
1
0
RESYNC
0
0