DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 234

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Figure 36-7. Transmit Side ESF Timing
NOTES:
1) TSYNC in frame mode (IOCR1.2 = 0) and double-wide frame sync is not enabled (IOCR1.3 = 0).
2) TSYNC in frame mode (IOCR1.2 = 0) and double-wide frame sync is enabled (IOCR1.3 = 1).
3) TSYNC in multiframe mode (IOCR1.2 = 1).
4) TLINK data (FDL bits) sampled during the F-bit time of odd frame and inserted into the outgoing T1
5) ZBTSI mode is enabled (T1TCR2.1 = 1).
6) TLINK data (Z bits) sampled during the F-bit time of frames 1, 5, 9, 13, 17, and 21 and inserted into
stream if enabled via TCR1.2.
the outgoing stream if enabled via T1TCR1.2.
TSYNC
FRAME#
TSYNC
TSYNC
TSSYNC
TLCLK
TLCLK
TLINK
TLINK
2
3
4
1
5
6
1
2
3
4
5
6
7
8
9 10 11 12
234 of 269
13 14 15 16 17 18 19 20 21 22 23 24 1
DS21455/DS21458 Quad T1/E1/J1 Transceivers
2
3
4
5