DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 51

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

8.4 Information Registers
Information registers operate the same as status registers except they cannot cause interrupts. They are all
latched except for INFO7 and some of the bits in INFO5 and INFO6. INFO7 register is a read only
register and it reports the status of the E1 synchronizer in real time. INFO7 and some of the bits in INFO6
and INFO5 are not latched and it is not necessary to precede a read of these bits with a write.
8.5 Interrupt Information Registers
The Interrupt Information Registers provide an indication of which Status Registers (SR1 through SR9)
are generating an interrupt. When an interrupt occurs, the host can read IIR1 and IIR2 to quickly identify
which of the 9 status registers are causing the interrupt.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
SR8
—
7
0
7
0
SR7
—
IIR1
Interrupt Information Register 1
14h
IIR2
Interrupt Information Register 2
15h
6
0
6
0
SR6
—
5
0
5
0
SR5
—
4
0
4
0
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SR4
—
3
0
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
SR3
—
2
0
2
0
SR2
—
1
0
1
0
SR1
SR9
0
0
0
0