DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 194

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

27.4 BERT Error Counter
Once the BERT has achieved synchronization, this 24-bit counter will increment for each data bit
received in error. Toggling the LC control bit in BC1 can clear this counter. This counter saturates when
full and will set the BECO status bit.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Error Counter Bits 0 to 7 (EC0 to EC7). EC0 is the LSB of the 24-bit counter.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Error Counter Bits 8 to 15 (EC8 to EC15).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Error Counter Bits 16 to 23 (EC16 to EC23). EC23 is the MSB of the 24-bit counter.
EC15
EC23
EC7
7
0
7
0
7
0
EC14
EC22
EC6
BEC1
BERT Error Count Register 1
E7h
BEC2
BERT Error Count Register 2
E8h
BEC3
BERT Error Count Register 3
E9h
6
0
6
0
6
0
EC13
EC21
EC5
5
0
5
0
5
0
EC12
EC20
EC4
4
0
4
0
4
0
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EC11
EC19
EC3
3
0
3
0
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
EC10
EC18
EC2
2
0
2
0
2
0
EC17
EC1
EC9
1
0
1
0
1
0
EC16
EC0
EC8
0
0
0
0
0
0