DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 237

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Figure 36-10. Transmit Side 2.048MHz Boundary Timing (With Elastic Store
Enabled)
NOTES:
1) TSER data in channels 1, 5, 9, 13, 17, 21, 25, and 29 is ignored.
2) TCHBLK is programmed to block channel 31 (if the TPCSI bit is set, then the signaling data at TSIG
3) TCHBLK is forced to one in the same channels as TSER is ignored (Note 1).
4) The F-bit position for the T1 frame is sampled and passed through the transmit side elastic store into
will be ignored).
the MSB bit position of channel 1. (Normally the transmit side formatter overwrites the F-bit position
unless the formatter is programmed to pass-through the F-bit position).
TCHBLK
TSYSCLK
TSSYNC
TCHCLK
TSER
TSIG
2,3
1
CHANNEL 31
CHANNEL 31
A
B
C/A D/B
LSB MSB
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CHANNEL 32
CHANNEL 32
A
DS21455/DS21458 Quad T1/E1/J1 Transceivers
B
C/A D/B
LSB
F
4
CHANNEL 1
CHANNEL 1
A