MAX5980GTJ+T Maxim Integrated, MAX5980GTJ+T Datasheet - Page 16

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MAX5980GTJ+T

Manufacturer Part Number
MAX5980GTJ+T
Description
Power Switch ICs - POE / LAN 0-16V Hot-Swap Controller
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX5980GTJ+T

Rohs
yes
Number Of Switches
Quad
Off Time (max)
0.1 ms
Operating Supply Voltage
32 V to 60 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
2758.6 mW
Minimum Operating Temperature
- 40 C
Operating Supply Current
5 mA
Table 1. PSE PI Detection Modes Electrical Requirements (IEEE 802.3at)
Quad, IEEE 802.3at/af PSE Controller
for Power-over-Ethernet
Enter semiautomatic mode by setting the port operating
mode (R12h, Table 19) to [10]. When entering semi mode,
the DET_EN_ and CLASS_EN_ bits retain their previous
states. When the DET_EN_ and/or CLASS_EN_ bits are set
to 1, the MAX5980 performs detection and/or classification
repeatedly, but do not power up the port(s) automatically.
Setting R19h[3:0] (PWR_ON_, Table 26) high turns on
power to the port(s) if detection and classification has
successfully completed. If a port is powered down while
in semiautomatic mode, the corresponding DET_EN_
and CLASS_EN_ bits are reset to 0.
Enter manual mode by setting the port operating mode
(R12h, Table 19) to [01]. Manual mode allows the soft-
ware to dictate any sequence of operation. In manual
mode, the Detection/Classification register (R14h, Table
22) is set to 00h, and DET_EN_/CLASS_EN_ become
pushbutton bits. A port will only perform a single detec-
tion/classification cycle when DET_EN_/CLASS_EN_ are
set high, and they are reset low after execution.
PWR_ON_ (R19h[3:0], Table 26) has the highest prior-
ity, and setting PWR_ON_ high at any time causes the
device to immediately enter the powered mode. Setting
DET_EN_ and CLASS_EN_ high at the same time causes
detection to be performed first. Once in the powered
state, the device ignores DET_EN_ and CLASS_EN_
commands.
16
Open-Circuit Voltage
Short-Circuit Current
Valid Test Voltage
Voltage Difference Between Test
Points
Time Between Any Two Test Points
Slew Rate
Accept Signature Resistance
Reject Signature Resistance
Open-Circuit Resistance
Accept Signature Capacitance
Reject Signature Capacitance
Signature Offset Voltage Tolerance
Signature Offset Current Tolerance
PARAMETER
Semiautomatic (Semi) Mode
SYMBOL
R
C
DV
V
V
R
C
R
GOOD
GOOD
V
VALID
V
SLEW
OPEN
I
I
t
Manual Mode
BAD
BAD
SC
OS
OC
TEST
BP
OS
< 15
MIN
500
2.8
19
10
1
2
0
0
To put a port into shutdown mode, set the correspond-
ing port mode bits (R12h, Table 19) to [00]. Putting
a port into shutdown mode immediately turns off port
power, clears the event and status bits, and halts all port
operations. In shutdown mode the serial interface is still
fully active; however, all DET_EN_, CLASS_EN_, and
PWR_ON_ commands are ignored.
During normal operation, the device probes the output
for a valid PD. A valid PD has a 25kI discovery signature
characteristic as specified in the IEEE 802.3at/af stan-
dard. Table 1 shows the IEEE 802.3at specification for a
PSE detecting a valid PD signature.
After each detection cycle, the device sets DET_
(R04h[3:0] and R05h[3:0], Table 9) to 1 and reports
the detection results in the detection status bits (see
Table 13). The DET_ bits are reset to 0 when read
through the CoR (clear on read) register (R05h), or after
a reset event.
During detection, the device keeps the external MOSFET
off and forces two probe voltages through OUT_. The
current through OUT_ is measured, as well as the volt-
age difference from AGND to OUT_. A two-point slope
measurement is used, as specified by the IEEE 802.3at/
af standard, to verify the device connected to the port.
The device implements appropriate settling times to
reject 50Hz/60Hz power-line noise coupling.
MAX
> 33
26.5
150
0.1
2.0
30
10
12
5
UNITS
V/Fs
mA
ms
kI
kI
kI
FA
nF
FF
V
V
V
V
In detection mode only
In detection mode only
This timing implies a 500Hz
maximum probing frequency
ADDITIONAL INFORMATION
Shutdown Mode
PD Detection

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