MAX5980GTJ+T Maxim Integrated, MAX5980GTJ+T Datasheet - Page 20

• Manufacturer Part Number: MAX5980GTJ+T
• Description: Power Switch ICs - POE / LAN 0-16V Hot-Swap Controller
• Manufacturer: Maxim Integrated

Specifications of MAX5980GTJ+T

• Rohs: yes
• Number Of Switches: Quad
• Off Time (max): 0.1 ms
• Operating Supply Voltage: 32 V to 60 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 2758.6 mW
• Minimum Operating Temperature: - 40 C
• Operating Supply Current: 5 mA

Quad, IEEE 802.3at/af PSE Controller
for Power-over-Ethernet
Figure 3. Foldback Current Characteristics
During startup and normal operation, an internal cir-
cuit senses the voltage at OUT_ and when necessary
reduces the current-limit clamp voltage (V
reduce the power dissipation through the external FET.
When I
V
and 5), foldback begins when V
V
mum current-limit threshold (V
V
Connect the gate of the external n-channel MOSFET to
GATE_. An internal 50FA current source pulls GATE_ to
(V
current source pulls down GATE_ to V
MOSFET.
The pullup and pulldown current controls the maximum
slew rate at the output during turn-on or turn-off. Use the
following equation to set the maximum slew rate:
where C
and the drain of the external MOSFET. The current limit
and the capacitive load at the drain control the slew
rate during startup. During current-limit regulation, the
device manipulates the GATE_ voltage to control the
voltage at SENSE_ (V
if V
20
OUT_
SU_LIM
OUT_
EE
RSENSE_
+ 10V) to turn on the MOSFET. An internal 40FA
LIM_
- V
- V
GD
EE
EE
eventually reduces down to the mini-
= 80h (Classes 0–3), foldback begins when
overshoots the limit threshold (V
is the total capacitance between the gate
> 46V (Figure 3).
> 32V; and when I
106.25mV
212.5mV
V
V
V
SU_LIM
SU_LIM
V
TH_FB
35mV
SENSE_
∆
V
RSENSE_
OUT_
∆
- V
t
EE
=
I
). A fast pulldown activates
MOSFET Gate Driver
CLASS 0 –3
GATE_
CLASS 4
C
TH_FB
OUT_
GD
LIM_
Foldback Current
= C0h (Classes 4
- V
EE
= 35mV) when
SU_LIM
EE
to turn off the
V
SU_LIM
FLBK_ST
18V
> 18V. The
) to help
). The
fast pulldown current increases with the amount of over-
shoot, and the maximum fast pulldown current is 50mA.
During turn-off, when the GATE_ voltage reaches a value
lower than 1.2V, a strong pulldown switch is activated to
keep the MOSFET securely off.
The device contains an open-drain logic output (INT) that
goes low when an interrupt condition exists. The Interrupt
register (R00h, Table 6) contains the interrupt flag bits and
the Interrupt Mask register (R01h, Table 7) determines
which events can trigger an interrupt. When an event
occurs, the appropriate Interrupt Event register bits (in
R02h to R0Bh) and the corresponding interrupt (in R00h)
are set to 1 and INT is asserted low (unless masked).
If the master device on the I
Response Address, any MAX5980 device on the bus that
has INT asserted will respond (see the Global Addressing
and the Alert Response Address (ARA) section).
As a response to an interrupt, the controller can read
the status of the event register(s) to determine the cause
of the interrupt and take appropriate action. Each inter-
rupt event register is paired with a Clear-on-Read (CoR)
register. When an interrupt event register is read through
the corresponding CoR register, the corresponding
event register is reset to 0 (clearing that interrupt event).
INT remains low and the interrupt is not reset when the
Interrupt Event register is read through the read-only
address. For example, to clear a supply event fault read
R0Bh (CoR) not R0Ah (read-only, see Table 12). Use the
INT_CLR bit (R1Ah[7], Table 27) to clear an interrupt, or
the RESET_IC bit (R1Ah[4]) to initiate software resets.
V
FLBK_ST
32V
V
FLBK_END
46V
2
C bus sends out an Alert
V
OUT_
- V
EE
Interrupt