HYB18T512160BF-2.5 Qimonda, HYB18T512160BF-2.5 Datasheet - Page 26

• Manufacturer Part Number: HYB18T512160BF-2.5
• Description: IC DDR2 SDRAM 512MBIT 84TFBGA
• Manufacturer: Qimonda

Specifications of HYB18T512160BF-2.5

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 400MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 84-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 675-1016-2

5.2
1)
2) The value of
3) Peak to peak ac noise on
4)
1)
2) Optional for DDR2-400, DDR2-533 and DDR2-667, mandatory for DDR2-800.
3) Measurement Definition for V
1) All other pins not under test = 0 V
2) DQ’s, LDQS, LDQS, UDQS, UDQS, DQS, DQS, RDQS, RDQS are disabled and ODT is turned off
Rev. 1.2, 2007-11
03292006-YBYM-WG0Z
Symbol
V
V
V
V
V
Parameter / Condition
Termination resistor impedance value for EMRS(1)[A6,A2] = [0,1]; 75 Ohm
Termination resistor impedance value for EMRS(1)[A6,A2] =[1,0]; 150 Ohm
Termination resistor impedance value for EMRS(1)(A6,A2)=[1,1]; 50 Ohm
Deviation of V
Symbol
I
I
IL
OL
DD
DDDL
DDQ
REF
TT
V
be about 0.5 ×
V
must track variations in die dc level of
Rtt(eff) = (V
Measurement Definition for Rtt(eff): Apply V
1) x 100%
DDQ
TT
is not applied directly to the device.
tracks with
IH(ac)
Parameter / Condition
Input Leakage Current; any input 0 V <
Output Leakage Current; 0 V < VOUT <
M
V
Parameter
Supply Voltage
Supply Voltage for DLL
Supply Voltage for Output
Input Reference Voltage
Termination Voltage
REF
with respect to V
V
DDQ
– V
V
may be selected by the user to provide optimum noise margin in the system. Typically the value of
DD
DC Characteristics
IL(ac)
,
of the transmitting device and
V
DDDL
) /(I(V
V
REF
tracks with
M
IHac
: Turn ODT on and measure voltage (V
may not exceed ± 2%
) – I(V
DDQ
/ 2
V
ILac
V
REF
V
DD
TT
)).
.
. AC parameters are measured with
is a system supply for signal termination resistors, is expected to be set equal to
IH(ac)
and V
V
Rating
1.7
1.7
1.7
0.49 ×
V
REF
Min.
REF
V
REF
IL(ac)
is expected to track variations in
V
– 0.04
V
IN <
(dc)
V
DDQ
to test pin separately, then measure current I(V
DDQ
V
26
DD
Recommended DC Operating Conditions (SSTL_18)
M
) at test pin (midpoint) with no load: delta V
Typ.
1.8
1.8
1.8
0.5 ×
V
REF
V
V
DDQ
DD
,
Symbol Min.
Rtt1(eff) 60
Rtt2(eff) 120
Rtt3(eff) 40
delta V
512-Mbit Double-Data-Rate-Two SDRAM
V
DDQ
Input and Output Leakage Currents
V
ODT DC Electrical Characteristics
Min.
–2
–5
and
DDQ
Max.
1.9
1.9
1.9
0.51 ×
V
M
REF
.
V
–6.00 —
DDDL
+ 0.04
V
tied together.
DDQ
Max.
+2
+5
HYB18T512[40/80/16]0BF
Nom. Max.
75
150
50
IHac
) and I(V
Internet Data Sheet
90
180
60
+ 6.00 %
V
V
V
V
Unit
V
M
Unit
µA
µA
= ((2 x V
V
TABLE 20
TABLE 21
TABLE 22
REF
ILac
) respectively.
is expected to
Unit Note
Ω
Ω
Ω
V
Note
1)
1)
1)
2)3)
4)
M
REF
Note
1)
2)
/ V
, and
1)
1)
1)2)
3)
DDQ
) –