HYB18T512160BF-2.5 Qimonda, HYB18T512160BF-2.5 Datasheet - Page 48

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HYB18T512160BF-2.5

Manufacturer Part Number
HYB18T512160BF-2.5
Description
IC DDR2 SDRAM 512MBIT 84TFBGA
Manufacturer
Qimonda
Datasheet

Specifications of HYB18T512160BF-2.5

Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (32Mx16)
Speed
400MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 95°C
Package / Case
84-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
675-1016-2
The following parameters are specified per their average values however, it is understood that the following relationship
between the average timing and the absolute instantaneous timing holds all the time.
Rev. 1.2, 2007-11
03292006-YBYM-WG0Z
Symbol
t
t
t
t
ERR.nPER
CH.AVG
CL.AVG
JIT.DUTY
Parameter
Cumulative error
across n cycles
Average high-pulse
width
Average low-pulse
width
Duty-cycle jitter
Description
t
from
where, i = 1 to 200 and
n = 3 for
n = 4 for
n = 5 for
6 ≤ n ≤ 10 for
11 ≤ n ≤ 50 for
t
any consecutive 200 high pulses:
N = 200
t
consecutive 200 low pulses:
N = 200
t
t
t
t
t
ERR.2PER
CH.AVG
CL.AVG
JIT.DUTY
JIT.CH
JIT.CL
JIT.CH
JIT.CL
t
CK.AVG
is the largest deviation of any single
= {
is the largest deviation of any single
= {
tERR nper
is defined as the average low-pulse width, as calculated across any
is defined as the average high-pulse width, as calculated across
tCH avg
= Min/Max of {
t
t
is defined as the cumulative error across n consecutive cycles
t
t
t
tCL avg
CLi
CHi
ERR.3PER
ERR.4PER
ERR.5PER
:
-
-
t
t
t
ERR.6-10PER
CL.AVG
CH.AVG
t
ERR.11-50PER
48
×
×
=
t
t
=
CK.AVG
JIT.CH
t
=
CK.AVG
--------------------------------------- - .
--------------------------------------- - .
N
N
i
,
} where i=1 to 200
+
} where i=1 to 200
t
j
JIT.CL
n 1
=
tCK avg
tCK avg
i
}, where:
1
512-Mbit Double-Data-Rate-Two SDRAM
tCK
1
j
t
t
CL
CH
from
from
n
j
j
N
=
t
t
tCK avg
CL.AVG
=
N
CH.AVG
HYB18T512[40/80/16]0BF
1
1
tCL
tCH
j
Internet Data Sheet
j
Units
ps
t
t
ps
CK.AVG
CK.AVG

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