C8051F005DK Silicon Laboratories Inc, C8051F005DK Datasheet - Page 119
C8051F005DK
Manufacturer Part Number
C8051F005DK
Description
DEV KIT FOR F005/006/007
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F005-TB.pdf
(171 pages)
Specifications of C8051F005DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F01x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F005
Silicon Family Name
C8051F00x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F005/006/007
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1188
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F005DK
Manufacturer:
SiliconL
Quantity:
1
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16.6.2. Clock Rate Register
119
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Bits7-0: SMB0CR.[7:0]: SMBus Clock Rate Preset
R/W
Bit7
The SMB0CR Clock Rate register controls the frequency of the serial clock SCL in master
mode. The 8-bit word stored in the SMB0CR Register preloads a dedicated 8-bit timer.
The timer counts up, and when it rolls over to 0x00, the SCL logic state toggles.
The SMB0CR setting should be bounded by the following equation, where SMB0CR is the
unsigned 8-bit value in register SMB0CR, and SYSCLK is the system clock frequency in
Hz:
The resulting SCL signal high and low times are given by the following equations:
Using the same value of SMB0CR from above, the Bus Free Timeout period is given in the
following equation:
R/W
Bit6
Figure 16.5. SMB0CR: SMBus Clock Rate Register
SMB0CR < ((288 - 0.85 * SYSCLK) / 1.125
T
T
R/W
Bit5
HIGH
BFT
T
LOW
10 * [(256 – SMB0CR) + 1] / SYSCLK
(258 – SMB0CR) / SYSCLK + 625 ns
= (256 – SMB0CR) / SYSCLK
R/W
Bit4
Rev. 1.7
R/W
Bit3
R/W
Bit2
E
6)
R/W
Bit1
R/W
Bit0
SFR Address:
Reset Value
00000000
0xCF
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