US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 149

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Bit 4—Noise Elimination Sampling Frequency Select (NESEL)
This bit selects the frequency at which the watch clock signal (φ
pulse generator is sampled, in relation to the oscillator clock (φ
pulse generator. When φ
Bit 4
NESEL
0
1
Bit 3—Direct Transfer on Flag (DTON)
This bit designates whether or not to make direct transitions among active (high-speed), active
(medium-speed) and subactive mode when a SLEEP instruction is executed. The mode to which
the transition is made after the SLEEP instruction is executed depends on a combination of other
control bits.
Bit 3
DTON
0
1
Bit 2—Medium Speed on Flag (MSON)
After standby, watch, or sleep mode is cleared, this bit selects active (high-speed) or active
(medium-speed) mode.
Description
Sampling rate is φ
Sampling rate is φ
Description
When a SLEEP instruction is executed in active mode,
a transition is made to standby mode, watch mode, or sleep mode
When a SLEEP instruction is executed in subactive mode, a transition is made to
watch mode or subsleep mode
When a SLEEP instruction is executed in active (high-speed) mode, a direct
transition is made to active (medium-speed) mode if SSBY = 0, MSON = 1, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
When a SLEEP instruction is executed in active (medium-speed) mode, a direct
transition is made to active (high-speed) mode if SSBY = 0, MSON = 0, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
When a SLEEP instruction is executed in subactive mode, a direct transition is
made to active (high-speed) mode if SSBY = 1, TMA3 = 1, LSON = 0, and MSON
= 0, or to active (medium-speed) mode if SSBY = 1, TMA3 = 1, LSON = 0, and
MSON = 1
OSC
= 2 to 20 MHz, clear NESEL to 0.
OSC
OSC
/16
/4
Rev. 8.00 Mar. 09, 2010 Page 127 of 658
OSC
W
) generated by the subclock
) generated by the system clock
Section 5 Power-Down Modes
REJ09B0042-0800
(initial value)
(initial value)

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