US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 560

no-image

US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Appendix A CPU Instruction Set
Rev. 8.00 Mar. 09, 2010 Page 538 of 658
REJ09B0042-0800
Notes: (1) Set to 1 when there is a carry or borrow from bit 11; otherwise cleared to 0.
Mnemonic
JSR @Rn
JSR @aa:16
JSR @@aa:8
RTS
RTE
SLEEP
LDC #xx:8, CCR
LDC Rs, CCR
STC CCR, Rd
ANDC #xx:8, CCR
ORC #xx:8, CCR
XORC #xx:8, CCR
NOP
EEPMOV
(2) If the result is zero, the previous value of the flag is retained; otherwise the flag is cleared to 0.
(3) Set to 1 if decimal adjustment produces a carry; otherwise retains value prior to arithmetic operation.
(4) The number of states required for execution is 4n + 9 (n = value of R4L). 4n + 8 for HD64F38024,
(5) Set to 1 if the divisor is negative; otherwise cleared to 0.
(6) Set to 1 if the divisor is zero; otherwise cleared to 0.
H8/38024S Group, and H8/38124 Group.
⎯ SP−2 → SP
⎯ SP−2 → SP
⎯ CCR ← @SP
⎯ Transit to sleep mode.
⎯ PC ← PC+2
⎯ if R4L≠0
B #xx:8 → CCR
B Rs8 → CCR
B CCR → Rd8
B CCR∧#xx:8 → CCR
B CCR∨#xx:8 → CCR
B CCR⊕#xx:8 → CCR
Operation
PC → @SP
PC ← Rn16
PC → @SP
PC ← aa:16
SP−2 → SP
PC → @SP
PC ← @aa:8
PC ← @SP
SP+2 → SP
SP+2 → SP
PC ← @SP
SP+2 → SP
Repeat @R5 → @R6
R5+1 → R5
R6+1 → R6
R4L−1 → R4L
Until R4L=0
else next;
2
2
2
2
Instruction Length (bytes)
2
2
Addressing Mode/
2
4
2
2 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8
2
2 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2
2 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2
4 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ (4)
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 6
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2
I H N Z V C
Condition Code
10
2
2
2
2
2

Related parts for US38024-BAG1