US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 421

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Bit 7—Clock Select (CKS)
Bit 7 sets the A/D conversion speed.
Bit 7
CKS
0
1
Notes: 1. With the H8/38024, H8/38024S, and H8/38024F-ZTAT operation cannot be guaranteed
Bit 6—External Trigger Select (TRGE)
Bit 6 enables or disables the start of A/D conversion by external trigger input.
Bit 6
TRGE
0
1
Note: * The external trigger (ADTRG) edge is selected by bit IEG4 of IEGR. See 1. IRQ edge
Bits 5 and 4—Reserved
Bits 5 and 4 are reserved; they are always read as 1, and cannot be modified.
2. H8/38124 Group only.
select register (IEGR) in section 3.3.2, Interrupt Control Registers, for details.
if the conversion time is less than 12.4 µs. Make sure to select a setting that gives a
conversion time of 12.4 µs or more.
With the H8/38124 Group operation cannot be guaranteed if the conversion time is less
than 6.2 μs. Make sure to select a setting that gives a conversion time of 6.2 μs or
more.
62/φ (initial value)
31/φ
Conversion Period
Description
Disables start of A/D conversion by external trigger
Enables start of A/D conversion by rising or falling edge of external trigger at pin
ADTRG *
φ = 1 MHz
62 µs
31 µs
Rev. 8.00 Mar. 09, 2010 Page 399 of 658
φ = 5 MHz
12.4 µs
— *
Conversion Time
1
Section 12 A/D Converter
REJ09B0042-0800
φ = 10 MHz *
6.2 µs
— *
1
(initial value)
2