US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 274

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 9 Timers
Timer Counter A (TCA)
TCA is an 8-bit read-only up-counter, which is incremented by internal clock input. The clock
source for input to this counter is selected by bits TMA3 to TMA0 in timer mode register A
(TMA). TCA values can be read by the CPU in active mode, but cannot be read in subactive
mode. When TCA overflows, the IRRTA bit in interrupt request register 1 (IRR1) is set to 1.
TCA is cleared by setting bits TMA3 and TMA2 of TMA to 11.
Upon reset, TCA is initialized to H'00.
Clock Stop Register 1 (CKSTPR1)
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to timer A is described here. For details of the other bits, see the
sections on the relevant modules.
Bit 0—Timer A Module Standby Mode Control (TACKSTP)
Bit 0 controls setting and clearing of module standby mode for timer A.
TACKSTP
0
1
Rev. 8.00 Mar. 09, 2010 Page 252 of 658
REJ09B0042-0800
Bit:
Initial value:
Read/Write:
Bit
Initial value
Read/Write
Description
Timer A is set to module standby mode
Timer A module standby mode is cleared
⎯
⎯
7
1
TCA7
R
7
0
⎯
⎯
6
1
TCA6
R
6
0
S32CKSTP ADCKSTP TGCKSTP
R/W
TCA5
5
1
R
5
0
R/W
TCA4
4
1
R
4
0
TCA3
R/W
3
1
R
3
0
TFCKSTP TCCKSTP TACKSTP
TCA2
R/W
R
2
0
2
1
TCA1
R/W
R
1
0
1
1
(initial value)
TCA0
R/W
R
0
0
0
1