US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 199
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US38024-BAG1
Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet
1.US38024-BAG1.pdf
(684 pages)
Specifications of US38024-BAG1
Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 199 of 684
- Download datasheet (5Mb)
6.9.3
In error protection, an error is detected when CPU runaway occurs during flash memory
programming/erasing, or operation is not performed in accordance with the program/erase
algorithm, and the program/erase operation is aborted. Aborting the program/erase operation
prevents damage to the flash memory due to overprogramming or overerasing.
When the following errors are detected during programming/erasing of flash memory, the FLER
bit in FLMCR2 is set to 1, and the error protection state is entered.
• When the flash memory of the relevant address area is read during programming/erasing
• Immediately after exception handling excluding a reset during programming/erasing
• When a SLEEP instruction is executed during programming/erasing
The FLMCR1, FLMCR2, and EBR settings are retained, however program mode or erase mode is
aborted at the point at which the error occurred. Program mode or erase mode cannot be re-entered
by re-setting the P or E bit. However, PV and EV bit setting is enabled, and a transition can be
made to verify mode. Error protection can be cleared only by a power-on reset.
6.10
In programmer mode, a PROM programmer can be used to perform programming/erasing via a
socket adapter, just as a discrete flash memory. Use a PROM programmer that supports the MCU
device type with the on-chip Renesas Technology 64-Kbyte flash memory (F-ZTAT64V3). A 10-
MHz input clock is required. For the conditions for transition to programmer mode, see table 6.7.
6.10.1
The socket adapter converts the pin allocation of the HD64F38024, HD64F38024R,
HD64F38124, and HD64F38122 to that of the discrete flash memory HN28F101. The address of
the on-chip flash memory is H'0000 to H'7FFF. Figure 6.12(1) shows a socket-adapter-pin
correspondence diagram of the HD64F38024 and HD64F38024R. Figure 6.12(2) shows a socket-
adapter-pin correspondence diagram of the HD64F38124 and HD64F38122.
(including vector read and instruction fetch)
Error Protection
Programmer Mode
Socket Adapter
Rev. 8.00 Mar. 09, 2010 Page 177 of 658
REJ09B0042-0800
Section 6 ROM
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