US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 156

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 5 Power-Down Modes
4. Input pins to which these notes apply:
5.4
5.4.1
The system goes from active or subactive mode to watch mode when a SLEEP instruction is
executed while the SSBY bit in SYSCR1 is set to 1 and bit TMA3 in TMA is set to 1.
In watch mode, operation of on-chip peripheral modules is halted except for timer A, timer F,
timer G, AEC and the LCD controller/driver (for which operation or halting can be set) is halted.
As long as a minimum required voltage is applied, the contents of CPU registers, the on-chip
RAM and some registers of the on-chip peripheral modules, are retained. I/O ports keep the same
states as before the transition.
Rev. 8.00 Mar. 09, 2010 Page 134 of 658
REJ09B0042-0800
IRQ
φ or φ
Capture possible:
case 1
Capture possible:
case 2
Capture possible:
case 3
Capture not
possible
External input signal
4
Figure 5.3 External Input Signal Capture when Signal Changes before/after
, IRQ
Transition to Watch Mode
Watch Mode
Operating
mode
SUB
3
, IRQ
1
, IRQ
Active (high-speed,
medium-speed) mode
or subactive mode
0
, WKP
t
t
Standby Mode or Watch Mode
cyc
subcyc
7
to WKP
t
t
cyc
subcyc
0
, IRQAEC, TMIC, TMIF, TMIG, ADTRG.
Standby mode
or watch mode
Interrupt by different
signal
t
t
cyc
subcyc
Wait for
oscillation
to settle
Active (high-speed,
medium-speed) mode
or subactive mode
t
t
cyc
subcyc

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