US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 81

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.7.2
In the program execution state the CPU executes program instructions in sequence.
There are three modes in this state, two active modes (high speed and medium speed) and one
subactive mode. Operation is synchronized with the system clock in active mode (high speed and
medium speed), and with the subclock in subactive mode. See section 5, Power-Down Modes for
details on these modes.
2.7.3
In the program halt state there are five modes: two sleep modes (high speed and medium speed),
standby mode, watch mode, and subsleep mode. See section 5, Power-Down Modes for details on
these modes.
2.7.4
The exception-handling state is a transient state occurring when exception handling is started by a
reset or interrupt and the CPU changes its normal processing flow. In exception handling caused
by an interrupt, SP (R7) is referenced and the PC and CCR values are saved on the stack.
For details on interrupt handling, see section 3.3, Interrupts.
Program halt state
Program Execution State
Program Halt State
Exception-Handling State
Reset
occurs
Reset state
Reset
occurs
SLEEP instruction executed
Figure 2.15 State Transitions
Reset cleared
Reset occurs
Interrupt
source
occurs
Rev. 8.00 Mar. 09, 2010 Page 59 of 658
Exception-handling state
Program execution state
Interrupt
source
occurs
REJ09B0042-0800
Section 2 CPU
Exception-
handling
complete