US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 369

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Bit 6—Receive Data Register Full (RDRF)
Bit 6 indicates that received data is stored in RDR.
Bit 6
RDRF
0
1
Note: If an error is detected in the receive data, or if the RE bit in SCR3 has been cleared to 0,
Bit 5—Overrun Error (OER)
Bit 5 indicates that an overrun error has occurred during reception.
Bit 5
OER
0
1
Notes: 1. When bit RE in SCR3 is cleared to 0, bit OER is not affected and retains its previous
RDR and bit RDRF are not affected and retain their previous state.
Note that if data reception is completed while bit RDRF is still set to 1, an overrun error
(OER) will result and the receive data will be lost.
2. RDR retains the receive data it held before the overrun error occurred, and data
state.
received after the error is lost. Reception cannot be continued with bit OER set to 1,
and in synchronous mode, transmission cannot be continued either.
Description
There is no receive data in RDR
Clearing conditions:
After reading RDRF = 1, cleared by writing 0 to RDRF
When RDR data is read by an instruction
There is receive data in RDR
Setting condition:
When reception ends normally and receive data is transferred from RSR to RDR
Description
Reception in progress or completed *
Clearing condition:
After reading OER = 1, cleared by writing 0 to OER
An overrun error has occurred during reception *
Setting condition:
When reception is completed with RDRF set to 1
1
Section 10 Serial Communication Interface
Rev. 8.00 Mar. 09, 2010 Page 347 of 658
2
REJ09B0042-0800
(initial value)
(initial value)

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