AN2131-DK001 Cypress Semiconductor Corp, AN2131-DK001 Datasheet - Page 207

KIT EZ-USB DEVELOPMENT BOARD

AN2131-DK001

Manufacturer Part Number
AN2131-DK001
Description
KIT EZ-USB DEVELOPMENT BOARD
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of AN2131-DK001

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1333
Bit 1:
Bit 0:
These bits, when set to “1,” connect an internal 3.69-MHz clock to UART0 and/or
UART1. The UARTs divide this frequency by 16, giving a 230-KHz baud clock if the cor-
responding SMOD bit is set, or 115 baud clock if the corresponding SMOD bit is clear.
(NOTE: SMOD0 is bit 7 or SFR 0x87, SMOD1 is bit 7 or SFR 0xD8). When the UART0
or UART1 bit is clear, the normal UART clock sources are used.
The ISOERR bits are updated at every SOF. They indicate that a CRC error was received
on a data packet for the current frame. The ISOERR bit status refers to the USB data
received in the previous frame, and which is currently in the endpoint’s OUT FIFO. If the
ISOERR bit = 1, indicating a bad CRC check, the data is still available in the OUTnDATA
register.
Page 12-14
UART230
ISOERR
12.8
12.9
ISO15ERR
b7
b7
R
R
0
x
-
230-Kbaud UART Operation - AN2122, AN2126
Isochronous Control/Status Registers
ISO14ERR
UART1
UART0
b6
b6
R
R
0
x
-
Figure 12-11. Isochronous OUT Endpoint Error Register
Figure 12-10. 230-Kbaud UART Operation Register
ISO13ERR
b5
b5
R
R
0
x
-
Universal 115/230 Kbaud operation for UART1
Universal 115/230 Kbaud operation for UART0
Isochronous OUT EP Error
230-Kbaud UART Control
Chapter 12. EZ-USB Registers
ISO12ERR
b4
b4
R
R
0
x
-
ISO11ERR
b3
b3
R
R
-
0
x
ISO10ERR
b2
b2
R
R
0
x
-
ISO9ERR
UART1
R/W
b1
b1
R
0
x
EZ-USB TRM v1.9
ISO8ERR
UART0
R/W
b0
b0
R
0
x
7F9F
7FA0

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