AN2131-DK001 Cypress Semiconductor Corp, AN2131-DK001 Datasheet - Page 211
AN2131-DK001
Manufacturer Part Number
AN2131-DK001
Description
KIT EZ-USB DEVELOPMENT BOARD
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.AN2131SC.pdf
(334 pages)
Specifications of AN2131-DK001
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1333
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Bit 0:
The I
stage. The controller also generates an I
DONE bit. The I
request bit whenever the 8051 reads or writes the I2DAT register.
The I
transition of the STOP bit. To enable this interrupt, set the STOPIE bit in the I2CMODE
register. The 8051 determines the interrupt source by checking the DONE and STOP bits
in the I2CS register.
Page 12-18
I2CMODE
b7
R
0
0
2
2
C controller sets this bit whenever it completes a byte transfer, right after the ACK
C interrupt includes one additional interrupt source in the AN2122/AN2126, a 1-0
DONE
b6
R
0
0
2
C controller automatically clears the DONE bit and the I
b5
0
R
0
I
2
Figure 12-15. I
C Transfer DONE
Chapter 12. EZ-USB Registers
b4
R
0
0
I
2
2
C interrupt request (8051 INT3) when it sets the
C Mode
2
C Mode Register
b3
R
0
0
b2
R
0
0
STOPIE
R/W
b1
0
2
C interrupt
EZ-USB TRM v1.9
b0
0
R
0
7FA7
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