AN2131-DK001 Cypress Semiconductor Corp, AN2131-DK001 Datasheet - Page 40

• Manufacturer Part Number: AN2131-DK001
• Description: KIT EZ-USB DEVELOPMENT BOARD
• Manufacturer: Cypress Semiconductor Corp

Specifications of AN2131-DK001

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1333

EZ-USB TRM v1.9
2131Q
15, 16,
26-29,
48-51,
34-37
57-60
7-12,
21
18
77
79
80
61
25
1
2121S
2122S
2131S
N/A
N/A
N/A
10
43
41
42
32
13
7
2125S
2126S
2135S
2136S
24-27,
28-31
N/A
N/A
10
43
41
42
32
13
7
2122T 2126T
N/A
N/A
N/A
47
45
46
35
14
11
7
Table 1-3. EZ-USB Series 2100 Pinouts by Pin Function
26-29,
30-33
N/A
N/A
47
45
46
35
14
11
7
A7, A8-A11,
D0-D3, D4-
A0-A5, A6,
DISCON#
A12-A15
RESET
PSEN#
AGND
USBD
USBD
Name
AVCC
BKPT
Chapter 1. Introducing EZ-USB
D7
Output
Output 0x0000 8051 Address bus. This bus is driven at all times.
Output
Output
Power
Power
Type
I/O/Z
I/O/Z
I/O/Z
Input
Default
N/A
N/A
N/A
HI
H
Z
Z
Z
0
Analog Vcc. This signal provides power to the ana-
log section of the chip.
Analog Ground. Connect to ground with as short a
path as possible.
Disconnect. This pin is controlled by two bits,
DISCOE and DISCON. When DISCOE=0, the pin
floats. When DISCOE=1, it drives. When
DISCOE=1, the driven logic level is the inverse of
the DISCON bit.
USB D- signal. Connect to the USB D- signal
through a 24-ohm resistor.
USB D+ signal. Connect to the USB D+ pin through
a 24-ohm resistor.
When the 8051 is addressing internal RAM it reflects
the internal address.
8051 Data bus. This bi-directional bus is high-
impedance when inactive, input for bus reads, and
output for bus writes. The data bus is also used to
transfer data directly to and from internal EZ-USB
FIFOs under control of the FRD# and FWR#
strobes. D0-D7 are active only for external bus
accesses, and are driven low in suspend.
Program Store Enable. This active-low signal indi-
cates a code fetch from external memory. It is active
for program memory fetches above 0x1B40 when
the EA pin is LO, or above 0x0000 when the EA
pin is HI.
Breakpoint. This pin goes active (high) when the
8051 address bus matches the BPADDRH/L regis-
ters and breakpoints are enabled in the USBBAV
register (BPEN=1). If the BPPULSE bit in the
USBBAV register is HI, this signal pulses high for
eight 24-MHz clocks. If the BPPULSE bit is LO, the
signal remains high until the 8051 clears the BREAK
bit (by writing 1 to it) in the USBBAV register.
Active High Reset. Resets the 8051 and the USB
SIE. This pin is normally tied to ground through a
10K-ohm resistor and to Vcc through a 1 F capac-
itor.
Description
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