PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 134

• Manufacturer Part Number: PIC12C672-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC12C672-10/SMR; PIC12C672-10/SMR

PICmicro MID-RANGE MCU FAMILY
DS31008A-page 8-12
Example 8-2
(such as the PIC16C74A). The user register, W_TEMP, must be defined across all banks and
must be defined at the same offset from the bank base address (i.e., W_TEMP is defined at 0x70
- 0x7F in Bank0). The user register, STATUS_TEMP, must be defined in Bank0.
Within the 70h - 7Fh range (Bank0), wherever W_TEMP is expected the corresponding locations
in the other banks should be dedicated for the possible saving of the W register.
The steps of
1.
2.
3.
4.
5.
If additional locations need to be saved before executing the Interrupt Service Routine (ISR)
code, they should be saved after the STATUS register is saved (step 2), and restored before the
STATUS register is restored (step 4).
Example 8-2: Saving the STATUS and W Registers in RAM
Stores the W register regardless of current bank.
Stores the STATUS register in Bank0.
Executes the Interrupt Service Routine (ISR) code.
Restores the STATUS (and bank select bit register).
Restores the W register.
MOVWF
SWAPF
BCF
MOVWF
:
: (Interrupt Service Routine (ISR) )
:
SWAPF
MOVWF
SWAPF
SWAPF
Example
stores and restores the STATUS and W registers for devices without common RAM
(for Devices without Common RAM)
W_TEMP
STATUS,W
STATUS,RP0
STATUS_TEMP
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
8-2:
; Copy W to a Temporary Register
;
; Swap STATUS nibbles and place
;
; Change to Bank0 regardless of
;
; Save STATUS to a Temporary register
;
; Swap original STATUS register value
;
; Restore STATUS register from
;
; Swap W_Temp nibbles and return
;
; Swap W_Temp to W to restore original
;
regardless of current bank
into W register
current bank
in Bank0
into W (restores original bank)
W register
value to W_Temp
W value without affecting STATUS
1997 Microchip Technology Inc.