PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 327

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PIC12C672-10/SM

Manufacturer Part Number
PIC12C672-10/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets

Specifications of PIC12C672-10/SM

Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Other names
PIC12C672-10/SMR
PIC12C672-10/SMR
Figure 17-35: Bus Collision During Start Condition (SDA only)
Figure 17-36: Bus Collision During Start Condition (SCL = 0)
1997 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
SDA
SCL
SEN
S
BCLIF
SSPIF
'0'
'0'
SCL = 0 before BRG time out,
Bus collision occurs, Set BCLIF.
Set SEN, enable start
sequence if SDA = 1, SCL = 1
condition if SDA = 1, SCL=1
Set SEN, enable start
SDA sampled low before
START condition.
S bit and SSPIF set because
SDA = 0, SCL = 1
. Set BCLIF,
SDA goes low before the SEN bit is set.
S bit and SSPIF set because
SDA = 0, SCL = 1
SDA = 0, SCL = 1
Set BCLIF.
T
BRG
Preliminary
T
BRG
SSPIF and BCLIF are
cleared in software.
SEN cleared automatically because of bus collision.
SSP module reset into idle state.
SCL = 0 before SDA = 0,
Bus collision occurs, Set BCLIF.
Section 17. MSSP
SSPIF and BCLIF are
cleared in software.
Interrupts cleared
in software.
'0'
'0'
DS31017A-page 17-51
17

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