PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 445

• Manufacturer Part Number: PIC12C672-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC12C672-10/SMR; PIC12C672-10/SMR

24.2
1997 Microchip Technology Inc.
Control Registers
bit 7-4:
bit 3:
bit 2:
bit 1:
bit 0:
Two A/D control registers are provided to control the conversion process. They are ADCON0 and
ADCON1. Both registers are readable and writable.
Register 24-1: ADCON0 Register
ADCS3:ADCS0: Analog Channel Select bits
0000 = AN0 input
0001 = AN1 input
0010 = AN2 input
0011 = AN3 input
0100 = Bandgap reference voltage input
0101 = Slope reference SREFHI input
0110 = Slope reference SREFLO input
0111 = AN11 input
1000 = AN12 input
1001 = AN13 input
1010 = AN4 input
1011 = AN5 input
1100 = AN6 input
1101 = AN7 input
1110 = AN14 input
1111 = AN15 input
Unimplemented: Read as '0'
AMUXOE: Analog MUX Output Enable
1 = Connect AMUX Output to AN0 pin (overrides TRIS setting)
0 = AN0 pin normal
ADRST: A/D Reset Control Bit
1 = Stop the A/D Timer, discharge CDAC capacitor
0 = Normal operation (A/D running)
ADZERO: A/D Zero Select Control
1 = Enable zeroing operation on AN1 and AN5
0 = Normal operation, sample AN1 and AN5 pins
bit 7
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
ADCS3
R/W-0
Note:
For devices that do not use the full 16 A/D input channels, the unimplemented selec-
tions are reserved. Do not select any unimplemented channels.
ADCS2
R/W-0
W = Writable bit
ADCS1
R/W-0
Section 24. Slope A/D
ADCS0
R/W-0
U-0
- n = Value at POR reset
—
AMUXOE
R/W-0
ADRST
R/W-1
DS31024A-page 24-3
bit 0
ADZERO
R/W-0
24