PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 381

• Manufacturer Part Number: PIC12C672-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC12C672-10/SMR; PIC12C672-10/SMR

20.12
1997 Microchip Technology Inc.
Initialization
The code in
of the PIC16C62X devices. RA3 and RA4 are configured as digital output. RA0 and RA1 are con-
figured as the V- inputs and RA2 as the V+ input to both comparators.
Example 20-1:
FLAG_REG
;
CLRF
CLRF
ANDLW
IORWF
MOVLW
MOVWF
BSF
MOVLW
MOVWF
BCF
CALL
MOVF
BCF
BSF
BSF
BCF
BSF
BSF
Example 20-1
EQU
FLAG_REG
PORTA
0xC0
FLAG_REG,F
0x03
CMCON
STATUS,RP0
0x07
TRISA
STATUS,RP0
DELAY 10
CMCON,F
PIR1,CMIF
STATUS,RP0
PIE1,CMIE
STATUS,RP0
INTCON,PEIE
INTCON,GIE
Initializing Comparator Module (PIC16C62X)
0X20
depicts example steps required to configure the comparator module
; Init flag register
; Init PORTA
; Mask comparator bits
; Store bits in flag register
; Init comparator mode
; CM<2:0> = 011
; Select Bank1
; Initialize data direction
; Set RA<2:0> as inputs, RA<4:3> as outputs,
;
; Select Bank0
; 10 s delay
; Read
; Clear pending interrupts
; Select Bank1
; Enable comparator interrupts
; Select Bank0
; Enable peripheral interrupts
; Global interrupt enable
Section 20. Comparator
TRISA<7:5> always read ‘0’
CMCON to end change condition
DS31020A-page 20-11
20