PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 204

• Manufacturer Part Number: PIC12C672-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC12C672-10/SMR; PIC12C672-10/SMR

PICmicro MID-RANGE MCU FAMILY
14.1
DS31014A-page 14-2
Introduction
Each CCP (Capture/Compare/PWM) module contains a 16-bit register which can operate as a
16-bit capture register, as a 16-bit compare register or as a 10-bit PWM master/slave Duty Cycle
register. The CCP modules are identical in operation, with the exception of the operation of the
special event trigger.
Each CCP module has 3 registers. Multiple CCP modules may exist on a single device. Through-
out this section we use generic names for the CCP registers. These generic names are shown
in
Table 14-1: Specific to Generic CCP Nomenclature
Table 14-2
shows the interactions between the CCP modules, where CCPx is one CCP module and CCPy
is another CCP module.
Table 14-2: CCP Mode - Timer Resource
Table 14-3: Interaction of Two CCP Modules
CCPx Mode CCPy Mode
Capture
Capture
Compare
PWM
PWM
PWM
Generic Name
Table
CCPxCON
CCPRxH
CCPRxL
CCPx
CCP Mode
14-1.
Compare
Capture
PWM
shows the resources of the CCP modules, in each of its modes. While
Capture
Compare
Compare
PWM
Capture
Compare
CCP1CON
CCPR1H
CCPR1L
CCP1
CCP1
Same TMR1 time-base.
The compare should be configured for the special event trigger,
which clears TMR1.
The compare(s) should be configured for the special event trigger,
which clears TMR1.
The PWMs will have the same frequency, and update rate
(TMR2 interrupt).
None
None
Timer Resource
Timer1
Timer1
Timer2
CCP2CON
CCPR2H
CCPR2L
CCP2
CCP2
Interaction
CCP control register
CCP High byte
CCP Low byte
CCP pin
1997 Microchip Technology Inc.
Comment
Table 14-3