PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 217

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PIC12C672-10/SM

Manufacturer Part Number
PIC12C672-10/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets

Specifications of PIC12C672-10/SM

Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Other names
PIC12C672-10/SMR
PIC12C672-10/SMR
14.7
1997 Microchip Technology Inc.
Design Tips
Question 1:
Answer 1:
The capture and compare modes are designed around Timer1, so no other timer can be used for
these functions. This also means that if multiple CCP modules (in parts with more than one) are
being used for a capture or compare function, they will share the same timer.
Question 2:
Answer 2:
The PWM mode is designed around Timer2, so no other timer can be used for this function. (It
is the only timer with a period register associated with it.) If multiple CCP modules (in parts with
more than one) are doing PWM they will share the same timer, meaning they will have the same
PWM period and frequency.
Question 3:
Answer 3:
The timers may be different, but other logic functions are shared. However you can switch from
one mode to the other. For a device with two CCP modules, you can also have CCP1 set up for
PWM and CCP2 set up for capture or compare (or vice versa) since they are two independent
modules.
Question 4:
Answer 4:
Any reset will turn the CCP module off. See the section on resets to see reset values.
Question 5:
Answer 5:
The CCP1IF flag will be set on the match condition. TMR1IF is set when Timer1 overflows, and
the special trigger reset of Timer1 is not considered an overflow. However, if both the CCPR1L
and CCPR1H registers are set at FFh, then an overflow occurs at the same time as the match,
which will then set both CCP1IF and TMR1IF.
Question 6:
Answer 6:
Timer2 always resets to zero when it equals PR2 and flag bit TMR2IF always gets set at this time.
By putting FFh into PR2, you will get an interrupt on overflow at FFh, as you would with Timer0,
for instance. Quite often it is desirable to have an event occur at a periodic rate, perhaps an inter-
rupt driven event. Normally an initial value would be placed into the timer so that the overflow will
occur at the desired time. This value would have to be placed back into the timer every time it
overflowed to make the interrupts occur at the same desired rate. The benefit of Timer2 is that a
value can be written to PR2 that will cause it to reset at your desired time interval. This means
you do not have the housekeeping chore of reloading the timer every time it overflows, since PR2
maintains its value.
What timers can I use for the capture and compare modes?
What timers can I use with the PWM mode?
Can I use one CCP module to do capture (or compare) AND PWM at the
same time, since they use different timers as their reference?
How does a reset affect the CCP module?
I am setting up the CCP1CON module for “Compare Mode, trigger special
event” (1011) which resets TMR1. When a compare match occurs, will I have
both the TMR1 and the CCP1 interrupts pending (TMR1IF is set, CCP1IF is
set)?
How do I use Timer2 as a general purpose timer, with an interrupt flag on
rollover?
Section 14. CCP
DS31014A-page 14-15
14

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