PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 573

• Manufacturer Part Number: PIC12C672-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC12C672-10/SMR; PIC12C672-10/SMR

30.2
1997 Microchip Technology Inc.
Absolute Maximums
The Absolute Maximum Ratings specify the worst case conditions that can be applied to the
device. These ratings are not meant as operational specifications, and stresses above the listed
values may cause damage to the device. Specifications are not always stand-alone, that is, the
specification may have other requirements as well.
An example of this is the “maximum current sourced/sunk by any I/O pin”. The number of I/O pins
that can be sinking/sourcing current, at any one time, is dependent upon the maximum current
sunk/source by the port(s) (combined) and the maximum current into the V
V
and internal logic. If these specifications are exceeded, then electromigration may occur on these
Power and Ground buses. Over time electromigration would cause these buses to open (be dis-
connected from the pin), and therefore cause the logic attached to these buses to stop operating.
So exceeding the absolute specifications may cause device reliability issues.
Input Clamp Current is defined as the current through the diode to V
specification.
Example Absolute Maximum Ratings
Ambient temperature under bias........................................................................... . -55 to +125˚C
Storage temperature .......................................................................................... -65˚C to +150˚C
Voltage on any pin with respect to V
Voltage on V
Voltage on MCLR with respect to V
Voltage on RA4 with respect to Vss .............................................................................. 0 to +14V
Total power dissipation
Maximum current out of V
Maximum current into V
Input clamp current, I
Output clamp current, I
Maximum output current sunk by any I/O pin..................................................................... 25 mA
Maximum output current sourced by any I/O pin ............................................................... 25 mA
Maximum current sunk by PORTA, PORTB, and PORTE (combined)............................. 200 mA
Maximum current sourced by PORTA, PORTB, and PORTE (combined) ....................... 200 mA
Maximum current sunk by PORTC and PORTD (combined) ........................................... 200 mA
Maximum current sourced by PORTC and PORTD (combined)...................................... 200 mA
Maximum current sourced by PORTC and PORTD (combined)...................................... 200 mA
Maximum current sourced by PORTF and PORTG (combined) ...................................... 100 mA
Maximum current sourced by PORTF and PORTG (combined) ...................................... 100 mA
†
nent damage to the device. This is a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the operation listings of this specifica-
tion is not implied. Exposure to maximum rating conditions for extended periods may affect
device reliability.
Section 30. Electrical Specifications
SS
NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause perma-
Note 1: Power dissipation is calculated as follows:
Note 2: Voltage spikes below V
pin. In this example, the physical reason is the Power and Ground bus width to the I/O ports
Pdis = V
may cause latch-up. Thus, a series resistor of 50-100
ing a “low” level to the MCLR pin rather than pulling this pin directly to V
DD
with respect to V
DD
IK
OK
x {I
(1)
(V
DD
SS
I
.................................................................................................... 1.0W
(V
DD
< 0 or V
pin ......................................................................................... 250 mA
O
pin ...................................................................................... 300 mA
-
< 0 or V
SS
I
OH
I
SS (2)
SS
SS
> V
....................................................................... -0.3 to +7.5V
} +
at the MCLR pin, inducing currents greater than 80 mA,
O
(except V
†
DD
> V
...................................................................... 0 to +14V
{(V
)....................................................................
DD
DD
) .............................................................
- V
DD
, MCLR, and RA4)..... -0.3V to (V
OH
) x I
OH
} + (V
SS
should be used when apply-
O
/V
l x I
DD
OL
if pin voltage exceeds
)
DS31030A-page 30-3
DD
pin or out of the
SS
DD
.
+ 0.3V)
20 mA
20 mA
30