PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 47

• Manufacturer Part Number: PIC12C672-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC12C672-10/SMR; PIC12C672-10/SMR

2.6
2.7
2.7.1
1997 Microchip Technology Inc.
Power-up Delays
Effects of Sleep Mode on the On-chip Oscillator
Effects of Device Reset on the On-chip Oscillator
When the device executes a SLEEP instruction, the on-chip clocks and oscillator are turned off
and the device is held at the beginning of an instruction cycle (Q1 state). With the oscillator off,
the OSC1 and OSC2 signals will stop oscillating. Since all the transistor switching currents have
been removed, sleep mode achieves the lowest current consumption of the device (only leakage
currents). Enabling any on-chip feature that will operate during sleep will increase the current
consumed during sleep. The user can wake from SLEEP through external reset, Watchdog Timer
Reset or through an interrupt.
Table 2-6:
Device resets have no effect on the on-chip crystal oscillator circuitry. The oscillator will continue
to operate as it does under normal execution. While in reset, the device logic is held at the Q1
state so that when the device exits reset, it is at the beginning of an instruction cycle.
The OSC2 pin, when used as the external clockout (EXTRC mode), will be held low during
reset, and as soon as the MCLR pin is at V
See
There are two timers that offer necessary delays on power-up. One is the Oscillator Start-up
Timer, OST, intended to keep the chip in RESET until the crystal oscillator is stable. The other is
the Power-up Timer (PWRT), which provides a fixed delay of 72 ms (nominal) on power-up only
(POR and BOR). The PWRT is designed to keep the part in RESET while the power supply sta-
bilizes. With these two timers on-chip, most applications need no external reset circuitry. For
additional information on reset operation, see the
See
Table
Table
LP, XT, and HS
OSC Mode
EXTRC
INTRC
3-1, in the
3-1, in the
OSC1 and OSC2 Pin States in Sleep Mode
“Reset”
“Reset”
Floating, external resistor should
pull high
N.A.
Feedback inverter disabled, at
quiescent voltage level
section, for time-outs due to Sleep and MCLR reset.
section, for time-outs due to Sleep and MCLR reset.
OSC1 Pin
Section 2. Oscillator
IH
(input high voltage), the RC will start to oscillate.
“Reset”
section.
At logic low
N.A.
Feedback inverter disabled, at
quiescent voltage level
OSC2 Pin
DS31002A-page 2-17
2