DSPIC30F3013-30I/SO Microchip Technology, DSPIC30F3013-30I/SO Datasheet - Page 109

IC DSPIC MCU/DSP 24K 28SOIC

DSPIC30F3013-30I/SO

Manufacturer Part Number
DSPIC30F3013-30I/SO
Description
IC DSPIC MCU/DSP 24K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3013-30I/SO

Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
30
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F301330ISO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3013-30I/SO
Manufacturer:
NSC
Quantity:
340
Part Number:
DSPIC30F3013-30I/SO
Manufacturer:
PIC
Quantity:
20 000
15.7.1
Each complementary output pair for the PWM module
has a 6-bit down counter that is used to produce the
dead-time insertion. As shown in Figure 15-5, each
dead-time unit has a rising and falling edge detector
connected to the duty cycle comparison output.
15.7.2
The DTCON2 SFR contains control bits that allow the
dead-times to be assigned to each of the complemen-
tary outputs. Table 15-2 summarizes the function of
each dead-time selection control bit.
TABLE 15-2:
FIGURE 15-5:
15.8
An independent PWM Output mode is required for driv-
ing certain types of loads. A particular PWM output pair
is in the Independent Output mode when the corre-
sponding PMOD bit in the PWMCON1 register is set.
No dead-time control is implemented between adjacent
PWM I/O pins when the module is operating in the
Independent mode and both I/O pins are allowed to be
active simultaneously.
 2004 Microchip Technology Inc.
DTS1A
DTS1I
DTS2A
DTS2I
DTS3A
DTS3I
DTS4A
DTS4I
Bit
Time selected by DTSxA bit (A or B)
PWMxH
Duty Cycle Generator
PWMxL
Independent PWM Output
Selects PWM1L/PWM1H active edge dead-time.
Selects PWM1L/PWM1H inactive edge
dead-time.
Selects PWM2L/PWM2H active edge dead-time.
Selects PWM2L/PWM2H inactive edge
dead-time.
Selects PWM3L/PWM3H active edge dead-time.
Selects PWM3L/PWM3H inactive edge
dead-time.
Selects PWM4L/PWM4H active edge dead-time.
Selects PWM4L/PWM4H inactive edge
dead-time.
DEAD-TIME GENERATORS
DEAD-TIME ASSIGNMENT
DEAD-TIME SELECTION BITS
DEAD-TIME TIMING DIAGRAM
Function
Preliminary
15.7.3
The amount of dead-time provided by each dead-time
unit is selected by specifying the input clock prescaler
value and a 6-bit unsigned value. The amount of dead-
time provided by each unit may be set independently.
Four input clock prescaler selections have been pro-
vided to allow a suitable range of dead-times, based on
the device operating frequency. The clock prescaler
option may be selected independently for each of the
two dead-time values. The dead-time clock prescaler
values are selected using the DTAPS<1:0> and
DTBPS<1:0> control bits in the DTCON1 SFR. One of
four clock prescaler options (T
may be selected for each of the dead-time values.
After the prescaler values are selected, the dead-time
for each unit is adjusted by loading two 6-bit unsigned
values into the DTCON1 SFR.
The dead-time unit prescalers are cleared on the fol-
lowing events:
• On a load of the down timer due to a duty cycle
• On a write to the DTCON1 or DTCON2 registers.
• On any device Reset.
In the Independent mode, each duty cycle generator is
connected to both of the PWM I/O pins in an output
pair. By using the associated duty cycle register and
the appropriate bits in the OVDCON register, the user
may select the following signal output options for each
PWM I/O pin operating in the Independent mode:
• I/O pin outputs PWM signal
• I/O pin inactive
• I/O pin active
comparison edge event.
Note:
DEAD-TIME RANGES
The user should not modify the DTCON1
or DTCON2 values while the PWM mod-
ule is operating (PTEN = 1). Unexpected
results may occur.
Time selected by DTSxI bit (A or B)
dsPIC30F
CY
, 2T
DS70082G-page 107
CY
, 4T
CY
or 8T
CY
)

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