DSPIC30F3013-30I/SO Microchip Technology, DSPIC30F3013-30I/SO Datasheet - Page 135

• Manufacturer Part Number: DSPIC30F3013-30I/SO
• Description: IC DSPIC MCU/DSP 24K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3013-30I/SO

• Program Memory Type: FLASH
• Program Memory Size: 24KB (8K x 24)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F301330ISO

19.3
The CAN Module can operate in one of several opera-
tion modes selected by the user. These modes include:
• Initialization Mode
• Disable Mode
• Normal Operation Mode
• Listen Only Mode
• Loop Back Mode
• Error Recognition Mode
Modes are requested by setting the REQOP<2:0> bits
(CiCTRL<10:8>), except the Error Recognition Mode
which is requested through the RXM<1:0> bits
(CiRXnCON<6:5>, where n = 0 or 1 represents a
particular receive buffer). Entry into a mode is acknowl-
edged by monitoring the OPMODE<2:0> bits (CiC-
TRL<7:5>). The module will not change the mode and
the OPMODE bits until a change in mode is acceptable,
generally during bus idle time which is defined as at
least 11 consecutive recessive bits.
19.3.1
In the Initialization mode, the module will not transmit or
receive. The error counters are cleared and the inter-
rupt flags remain unchanged. The programmer will
have access to configuration registers that are access
restricted in other modes. The module will protect the
user from accidentally violating the CAN protocol
through programming errors. All registers which control
the configuration of the module can not be modified
while the module is on-line. The CAN module will not
be allowed to enter the configuration mode while a
transmission is taking place. The Configuration mode
serves as a lock to protect the following registers.
• All Module Control Registers
• Baud Rate and interrupt Configuration Registers
• Bus Timing Registers
• Identifier Acceptance Filter Registers
• Identifier Acceptance Mask Registers
19.3.2
In Disable Mode, the module will not transmit or
receive. The module has the ability to set the WAKIF bit
due to bus activity, however any pending interrupts will
remain and the error counters will retain their value.
If the REQOP<2:0> bits (CiCTRL<10:8>) = ‘001’, the
module will enter the module disable mode. If the mod-
ule is active, the module will wait for 11 recessive bits
on the CAN bus, detect that condition as an idle bus,
then accept the module disable command. When the
OPMODE<2:0> bits (CiCTRL<7:5>) = ‘001’, that indi-
cates whether the module successfully went into mod-
ule disable mode. The I/O pins will revert to normal I/O
function when the module is in the module disable
mode.
 2004 Microchip Technology Inc.
Modes of Operation
INITIALIZATION MODE
DISABLE MODE
Preliminary
The module can be programmed to apply a low-pass
filter function to the CiRX input line while the module or
the CPU is in Sleep mode. The WAKFIL bit
(CiCFG2<14>) enables or disables the filter.
19.3.3
Normal
REQOP<2:0> = ‘000’. In this mode, the module is acti-
vated, the I/O pins will assume the CAN bus functions.
The module will transmit and receive CAN bus mes-
sages via the CxTX and CxRX pins.
19.3.4
If the listen only mode is activated, the module on the
CAN bus is passive. The transmitter buffers revert to
the Port I/O function. The receive pins remain inputs.
For the receiver, no error flags or acknowledge signals
are sent. The error counters are deactivated in this
state. The listen only mode can be used for detecting
the baud rate on the CAN bus. To use this, it is neces-
sary that there are at least two further nodes that com-
municate with each other.
19.3.5
The module can be set to ignore all errors and receive
any message. The error recognition mode is activated
by setting REQOP<2:0> = 111. In this mode the data
which is in the message assembly buffer until the time
an error occurred, is copied in the receive buffer and
can be read via the CPU interface.
19.3.6
If the loopback mode is activated, the module will con-
nect the internal transmit signal to the internal receive
signal at the module boundary. The transmit and
receive pins revert to their Port I/O function.
Note:
operating
Typically, if the CAN module is allowed to
transmit in a particular mode of operation
and a transmission is requested immedi-
ately after the CAN module has been
placed in that mode of operation, the mod-
ule waits for 11 consecutive recessive bits
on the bus before starting transmission. If
the user switches to Disable Mode within
this 11-bit period, then this transmission is
aborted and the corresponding TXABT bit
is set and TXREQ bit is cleared.
NORMAL OPERATION MODE
LISTEN ONLY MODE
LISTEN ALL MESSAGES MODE
LOOP BACK MODE
mode
dsPIC30F
is
DS70082G-page 133
selected
when