MC9RS08KA2CSCR Freescale Semiconductor, MC9RS08KA2CSCR Datasheet - Page 118

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MC9RS08KA2CSCR

Manufacturer Part Number
MC9RS08KA2CSCR
Description
IC MCU 8BIT 2K FLASH 8-SOIC
Manufacturer
Freescale Semiconductor
Series
RS08r
Datasheet

Specifications of MC9RS08KA2CSCR

Core Processor
RS08
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, WDT
Number Of I /o
4
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
63 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
RS08KA
Core
RS08
Data Bus Width
8 bit
Data Ram Size
63 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
DEMO9RS08KA8, DEMO9RS08KA2
Minimum Operating Temperature
- 40 C
For Use With
DEMO9RS08KA2 - DEMO BOARD FOR 9RS08KA2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Appendix A Electrical Characteristics
1
2
3
A.9
This section describes ac timing characteristics for each peripheral system.
A.9.1
1
2
3
118
Stop recovery time (FLL wakeup to previous acquired
frequency)
IREFSTEN=0
IREFSTEN=1
Bus frequency (t
Real time interrupt internal oscillator period
External RESET pulse width
KBI pulse width
KBI pulse width in stop
Port rise and fall time (load = 50 pF)
Data in typical column was characterized at 3.0 V and 5.0 V, 25°C or is typical recommended value.
This parameter is characterized and not tested on each device.
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBILP) to FLL enabled (FEI, FBI).
This is the shortest pulse that is guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be
recognized.
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
Timing is shown with respect to 20% V
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
AC Characteristics
Control Timing
2
cyc
= 1/f
Characteristic
1
Bus
Parameter
RESET
)
1
Table A-7. Internal Clock Source Specifications
3
DD
MC9RS08KA2 Series Data Sheet, Rev. 4
and 80% V
Table A-8. Control Timing
Figure A-1. Reset Timing
DD
levels. Temperature range –40°C to 85°C.
t_wakeup
t
Symbol
Symbol
t
Rise
t
KBIPWS
t
KBIPW
t
t
t
fll_wu
ir_wu
f
extrst
t
extrst
Bus
RTI
, t
Fall
1.5 t
Min
Min
700
150
100
dc
cyc
Typical
Typ
1000
100
86
11
35
1
Freescale Semiconductor
1300
Max
Max
10
MHz
Unit
Unit
μs
μs
ns
ns
ns
ns

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