MC9RS08KA2CSCR Freescale Semiconductor, MC9RS08KA2CSCR Datasheet - Page 57

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MC9RS08KA2CSCR

Manufacturer Part Number
MC9RS08KA2CSCR
Description
IC MCU 8BIT 2K FLASH 8-SOIC
Manufacturer
Freescale Semiconductor
Series
RS08r
Datasheet

Specifications of MC9RS08KA2CSCR

Core Processor
RS08
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, WDT
Number Of I /o
4
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
63 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
RS08KA
Core
RS08
Data Bus Width
8 bit
Data Ram Size
63 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
DEMO9RS08KA8, DEMO9RS08KA2
Minimum Operating Temperature
- 40 C
For Use With
DEMO9RS08KA2 - DEMO BOARD FOR 9RS08KA2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Chapter 8
Central Processor Unit (RS08CPUV1)
8.1
This chapter is a summary of information about the registers, addressing modes, and instruction set of the
RS08 Family CPU. For a more detailed discussion, refer to the RS08 Core Reference Manual, volume 1,
Freescale Semiconductor document order number RS08RMv1.
The RS08 CPU has been developed to target extremely low-cost embedded applications using a
process-independent design methodology, allowing it to keep pace with rapid developments in silicon
processing technology.
The main features of the RS08 core are:
8.2
Figure 8-1
memory map of the microcontroller. They are built directly inside the CPU logic.
Freescale Semiconductor
Streamlined programmer’s model
Subset of HCS08 instruction set with minor instruction extensions
Minimal instruction set for cost-sensitive embedded applications
New instructions for shadow program counter manipulation, SHA and SLA
New short and tiny addressing modes for code size optimization
16K bytes accessible memory space
Reset will fetch the first instruction from $3FFD
Low-power modes supported through the execution of the STOP and WAIT instructions
Debug and FLASH programming support using the background debug controller module
Illegal address and opcode detection with reset
Introduction
Programmer’s Model and CPU Registers
shows the programmer’s model for the RS08 CPU. These registers are not located in the
MC9RS08KA2 Series Data Sheet, Rev. 4
57

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