MC9RS08KA2CSCR Freescale Semiconductor, MC9RS08KA2CSCR Datasheet - Page 79

• Manufacturer Part Number: MC9RS08KA2CSCR
• Description: IC MCU 8BIT 2K FLASH 8-SOIC
• Manufacturer: Freescale Semiconductor
• Series: RS08r

Specifications of MC9RS08KA2CSCR

• Core Processor: RS08
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, WDT
• Number Of I /o: 4
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 63 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: RS08KA
• Core: RS08
• Data Bus Width: 8 bit
• Data Ram Size: 63 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: DEMO9RS08KA8, DEMO9RS08KA2
• Minimum Operating Temperature: - 40 C
• For Use With: DEMO9RS08KA2 - DEMO BOARD FOR 9RS08KA2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

9.3.3
9.3.4
Freescale Semiconductor
CLKST
FTRIM
Field
TRIM
Field
7:0
2
0
Reset:
Reset:
POR:
POR:
W
W
R
R
ICS Trim Register (ICSTRM)
ICS Status and Control (ICSSC)
ICS Trim Setting — The TRIM bits control the internal reference clock frequency by controlling the internal
reference clock period. The bits’ effect are binary weighted (i.e., bit 1 will adjust twice as much as bit 0).
Increasing the binary value in TRIM will increase the period, and decreasing the value will decrease the period.
An additional fine trim bit is available in ICSSC as the FTRIM bit.
Clock Mode Status — The CLKST read-only bit indicate the current clock mode. The CLKST bit does not update
immediately after a write to the CLKS bit due to internal synchronization between clock domains.
0 Output of FLL is selected
1 Internal reference clock is selected
ICS Fine Trim — The FTRIM bit controls the smallest adjustment of the internal reference clock frequency.
Setting FTRIM will increase the period and clearing FTRIM will decrease the period by the smallest amount
possible.
U
1
0
7
7
0
0
= Unimplemented
Figure 9-6. ICS Status and Control Register (ICSSC)
U
0
0
0
0
6
6
Figure 9-5. ICS Trim Register (ICSTRM)
Table 9-4. ICSTRM Field Descriptions
Table 9-5. ICSSC Field Descriptions
MC9RS08KA2 Series Data Sheet, Rev. 4
U
0
0
0
0
5
5
U
0
0
0
0
4
4
Description
Description
TRIM
U
0
0
0
0
3
3
CLKST
U
0
0
0
2
2
Internal Clock Source (RS08ICSV1)
U
0
0
0
0
1
1
FTRIM
U
U
0
0
0
0
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