MC9RS08KA2CSCR Freescale Semiconductor, MC9RS08KA2CSCR Datasheet - Page 97

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MC9RS08KA2CSCR

Manufacturer Part Number
MC9RS08KA2CSCR
Description
IC MCU 8BIT 2K FLASH 8-SOIC
Manufacturer
Freescale Semiconductor
Series
RS08r
Datasheet

Specifications of MC9RS08KA2CSCR

Core Processor
RS08
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, WDT
Number Of I /o
4
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
63 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
RS08KA
Core
RS08
Data Bus Width
8 bit
Data Ram Size
63 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
DEMO9RS08KA8, DEMO9RS08KA2
Minimum Operating Temperature
- 40 C
For Use With
DEMO9RS08KA2 - DEMO BOARD FOR 9RS08KA2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Chapter 12
Development Support
12.1
Development support systems in the RS08 family include the RS08 background debug controller (BDC).
The BDC provides a single-wire debug interface to the target MCU. This interface provides a convenient
means for programming the on-chip FLASH and other nonvolatile memories. Also, the BDC is the
primary debug interface for development and allows non-intrusive access to memory data and traditional
debug features such as CPU register modify, breakpoint, and single-instruction trace commands.
In the RS08 Family, address and data bus signals are not available on external pins. Debug is done through
commands fed into the target MCU via the single-wire background debug interface, including resetting the
device without using a reset pin.
12.2
Features of the RS08 background debug controller (BDC) include:
Freescale Semiconductor
Uses a single pin for background debug serial communications
Non-intrusive of user memory resources; BDC registers are not located in the memory map
SYNC command to determine target communications rate
Non-intrusive commands allow access to memory resources while CPU is running user code
without stopping applications
Active background mode commands for CPU register access
GO and TRACE1 commands
BACKGROUND command can wake CPU from wait or stop modes
Introduction
Features
TARGET
USER PCB
MCU
Figure 12-1. Connecting MCU to Host for Debugging
COMMAND TRANSLATOR
MC9RS08KA2 Series Data Sheet, Rev. 4
RS08 POD
RS-232
USB, Ethernet
HOST
97

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