MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 115

• Manufacturer Part Number: MC9S08JM16CGT
• Description: MCU 8BIT 16K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM16CGT

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Controller Family/series: HCS08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Digital Ic Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
SUB #opr8i
SUB opr8a
SUB opr16a
SUB oprx16,X
SUB oprx8,X
SUB ,X
SUB oprx16,SP
SUB oprx8,SP
SWI
TAP
TAX
TPA
TST opr8a
TSTA
TSTX
TST oprx8,X
TST ,X
TST oprx8,SP
TSX
TXA
Source
Form
Subtract
A ← (A) – (M)
Software Interrupt
PC ← (PC) + $0001
Push (PCL); SP ← (SP) – $0001
Push (PCH); SP ← (SP) – $0001
Push (X); SP ← (SP) – $0001
Push (A); SP ← (SP) – $0001
Push (CCR); SP ← (SP) – $0001
I ← 1;
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
Transfer Accumulator to CCR
CCR ← (A)
Transfer Accumulator to X (Index Register
Low)
X ← (A)
Transfer CCR to Accumulator
A ← (CCR)
Test for Negative or Zero
Transfer SP to Index Reg.
H:X ← (SP) + $0001
Transfer X (Index Reg. Low) to Accumulator
A ← (X)
Table 7-2. . Instruction Set Summary (Sheet 8 of 9)
Operation
MC9S08JM16 Series Data Sheet, Rev. 2
(M) – $00
(A) – $00
(X) – $00
(M) – $00
(M) – $00
(M) – $00
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
INH
INH
INH
INH
DIR
INH
INH
IX1
IX
SP1
INH
INH
Object Code
9E D0
9E E0
9E 6D
A0
B0
C0
D0
E0
F0
83
84
97
85
3D
4D
5D
6D
7D
95
9F
ii
dd
hh ll
ee ff
ff
ee ff
ff
dd
ff
ff
Chapter 7 Central Processor Unit (S08CPUV2)
11
2
3
4
4
3
3
5
4
1
1
1
4
1
1
4
3
5
2
1
p
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
sssssvvfppp
p
p
p
rfpp
p
p
rfpp
rfp
prfpp
fp
Cyc-by-Cyc
Details
VH I N Z C
– – 1 – – –
– – – – – –
– – – – – –
0 –
– – – – – –
– – – – – –
on CCR
–
Affect
–
–
–
115