MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 94

• Manufacturer Part Number: MC9S08JM16CGT
• Description: MCU 8BIT 16K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM16CGT

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Controller Family/series: HCS08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Digital Ic Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 6 Parallel Input/Output
94
[6:4, 1:0]
[6:4, 1:0]
Reset
Reset
6:4, 1:0
6:4, 1:0
PTFDS
PTFSE
Field
Field
W
W
R
R
Output Slew Rate Control Enable for Port F Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTF pin. For port F pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port F bit n.
1 Output slew rate control enabled for port F bit n.
Output Drive Strength Selection for Port F Bits — Each of these control bits selects between low and high
output drive for the associated PTF pin.
0 Low output drive enabled for port F bit n.
1 High output drive enabled for port F bit n.
0
0
7
7
Figure 6-30. Output Slew Rate Control Enable for Port F (PTFSE)
Figure 6-31. Output Drive Strength Selection for Port F (PTFDS)
PTFDS6
PTFSE6
1
0
6
6
Table 6-29. PTFSE Register Field Descriptions
Table 6-30. PTFDS Register Field Descriptions
PTFSE5
PTFDS5
MC9S08JM16 Series Data Sheet, Rev. 2
1
0
5
5
PTFSE4
PTFDS4
1
0
4
4
Description
Description
3
1
3
0
1
0
2
2
PTFDS1
PTFSE1
Freescale Semiconductor
1
0
1
1
PTFDS0
PTFSE0
1
0
0
0